Commit ad341aac authored by Marc-André Lureau's avatar Marc-André Lureau Committed by Gerd Hoffmann
Browse files

virtio-gpu: block both 2d and 3d rendering 

Now that 2d commands are translated to 3d rendering, qemu must stop
sending 3d updates (from 2d) to Spice as well.

Fixes:
https://bugzilla.redhat.com/show_bug.cgi?id=1674324



Cc: cfergeau@redhat.com
Signed-off-by: default avatarMarc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: default avatarChristophe Fergeau <cfergeau@redhat.com>
Tested-by: default avatarChristophe Fergeau <cfergeau@redhat.com>
Message-id: 20190221114330.17968-4-marcandre.lureau@redhat.com
Signed-off-by: default avatarGerd Hoffmann <kraxel@redhat.com>
parent 4a9102c5

hw/display/virtio-gpu-3d.c

+0 −21
Original line number Diff line number Diff line
@@ -404,11 +404,6 @@ void virtio_gpu_virgl_process_cmd(VirtIOGPU *g, 
{

    VIRTIO_GPU_FILL_CMD(cmd->cmd_hdr);



    cmd->waiting = g->renderer_blocked;

    if (cmd->waiting) {

        return;

    }



    virgl_renderer_force_ctx_0();

    switch (cmd->cmd_hdr.type) {

    case VIRTIO_GPU_CMD_CTX_CREATE:
@@ -604,22 +599,6 @@ void virtio_gpu_virgl_reset(VirtIOGPU *g) 
    }

}



void virtio_gpu_gl_block(void *opaque, bool block)

{

    VirtIOGPU *g = opaque;



    if (block) {

        g->renderer_blocked++;

    } else {

        g->renderer_blocked--;

    }

    assert(g->renderer_blocked >= 0);



    if (g->renderer_blocked == 0) {

        virtio_gpu_process_cmdq(g);

    }

}



int virtio_gpu_virgl_init(VirtIOGPU *g)

{

    int ret;

hw/display/virtio-gpu.c

+22 −5
Original line number Diff line number Diff line
@@ -889,12 +889,15 @@ void virtio_gpu_process_cmdq(VirtIOGPU *g) 
    while (!QTAILQ_EMPTY(&g->cmdq)) {

        cmd = QTAILQ_FIRST(&g->cmdq);



        /* process command */

        VIRGL(g, virtio_gpu_virgl_process_cmd, virtio_gpu_simple_process_cmd,

              g, cmd);

        cmd->waiting = g->renderer_blocked;

        if (cmd->waiting) {

            break;

        }



        /* process command */

        VIRGL(g, virtio_gpu_virgl_process_cmd, virtio_gpu_simple_process_cmd,

              g, cmd);



        QTAILQ_REMOVE(&g->cmdq, cmd, next);

        if (virtio_gpu_stats_enabled(g->conf)) {

            g->stats.requests++;
@@ -1030,14 +1033,28 @@ static int virtio_gpu_ui_info(void *opaque, uint32_t idx, QemuUIInfo *info) 
    return 0;

}



static void virtio_gpu_gl_block(void *opaque, bool block)

{

    VirtIOGPU *g = opaque;



    if (block) {

        g->renderer_blocked++;

    } else {

        g->renderer_blocked--;

    }

    assert(g->renderer_blocked >= 0);



    if (g->renderer_blocked == 0) {

        virtio_gpu_process_cmdq(g);

    }

}



const GraphicHwOps virtio_gpu_ops = {

    .invalidate = virtio_gpu_invalidate_display,

    .gfx_update = virtio_gpu_update_display,

    .text_update = virtio_gpu_text_update,

    .ui_info = virtio_gpu_ui_info,

#ifdef CONFIG_VIRGL

    .gl_block = virtio_gpu_gl_block,

#endif

};



static const VMStateDescription vmstate_virtio_gpu_scanout = {

include/hw/virtio/virtio-gpu.h

+0 −1
Original line number Diff line number Diff line
@@ -169,7 +169,6 @@ void virtio_gpu_virgl_process_cmd(VirtIOGPU *g, 
                                  struct virtio_gpu_ctrl_command *cmd);

void virtio_gpu_virgl_fence_poll(VirtIOGPU *g);

void virtio_gpu_virgl_reset(VirtIOGPU *g);

void virtio_gpu_gl_block(void *opaque, bool block);

int virtio_gpu_virgl_init(VirtIOGPU *g);

int virtio_gpu_virgl_get_num_capsets(VirtIOGPU *g);

#endif