Commit ab6dd380 authored by Edgar E. Iglesias's avatar Edgar E. Iglesias
Browse files

target-microblaze: dec_msr: Fix MTS to FSR 



Fix moves to FSR. Not only bit 31 is accessible.

Reviewed-by: default avatarAlistair Francis <alistair.francis@wdc.com>
Reviewed-by: default avatarRichard Henderson <richard.henderson@linaro.org>
Signed-off-by: default avatarEdgar E. Iglesias <edgar.iglesias@xilinx.com>
parent 351527b7

target/microblaze/translate.c

+1 −3
Original line number Diff line number Diff line
@@ -533,11 +533,9 @@ static void dec_msr(DisasContext *dc) 
                break;

            case SR_EAR:

            case SR_ESR:

            case SR_FSR:

                tcg_gen_mov_i32(cpu_SR[sr], cpu_R[dc->ra]);

                break;

            case 0x7:

                tcg_gen_andi_i32(cpu_SR[SR_FSR], cpu_R[dc->ra], 31);

                break;

            case 0x800:

                tcg_gen_st_i32(cpu_R[dc->ra],

                               cpu_env, offsetof(CPUMBState, slr));