Commit aae39d24 authored by Peter Maydell's avatar Peter Maydell
Browse files

Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20180116' into staging 



target-arm queue:
 * SDHCI: cleanups and minor bug fixes
 * target/arm: minor refactor preparatory to fp16 support
 * omap_ssd, ssi-sd, pl181, milkymist-memcard: reset the SD
   card on controller reset (fixes migration failures)
 * target/arm: Handle page table walk load failures correctly
 * hw/arm/virt: Add virt-2.12 machine type
 * get_phys_addr_pmsav7: Support AP=0b111 for v7M
 * hw/intc/armv7m: Support byte and halfword accesses to CFSR

# gpg: Signature made Tue 16 Jan 2018 13:33:31 GMT
# gpg:                using RSA key 0x3C2525ED14360CDE
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>"
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>"
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-target-arm-20180116: (24 commits)
  sdhci: add a 'dma' property to the sysbus devices
  sdhci: fix the PCI device, using the PCI address space for DMA
  sdhci: Implement write method of ACMD12ERRSTS register
  sdhci: fix CAPAB/MAXCURR registers, both are 64bit and read-only
  sdhci: rename the SDHC_CAPAB register
  sdhci: move MASK_TRNMOD with other SDHC_TRN* defines in "sd-internal.h"
  sdhci: convert the DPRINT() calls into trace events
  sdhci: use qemu_log_mask(UNIMP) instead of fprintf()
  sdhci: refactor common sysbus/pci unrealize() into sdhci_common_unrealize()
  sdhci: refactor common sysbus/pci realize() into sdhci_common_realize()
  sdhci: refactor common sysbus/pci class_init() into sdhci_common_class_init()
  sdhci: use DEFINE_SDHCI_COMMON_PROPERTIES() for common sysbus/pci properties
  sdhci: remove dead code
  sdhci: clean up includes
  target/arm: Add fp16 support to vfp_expand_imm
  target/arm: Split out vfp_expand_imm
  hw/sd/omap_mmc: Reset SD card on controller reset
  hw/sd/ssi-sd: Reset SD card on controller reset
  hw/sd/milkymist-memcard: Reset SD card on controller reset
  hw/sd/pl181: Reset SD card on controller reset
  ...

Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parents f521eeee 60765b6c

hw/arm/virt.c

+17 −2
Original line number Original line Diff line number Diff line
@@ -1618,7 +1618,7 @@ static void machvirt_machine_init(void) 
}

}

type_init(machvirt_machine_init);

type_init(machvirt_machine_init);





static void virt_2_11_instance_init(Object *obj)

static void virt_2_12_instance_init(Object *obj)

{

{

    VirtMachineState *vms = VIRT_MACHINE(obj);

    VirtMachineState *vms = VIRT_MACHINE(obj);

    VirtMachineClass *vmc = VIRT_MACHINE_GET_CLASS(vms);

    VirtMachineClass *vmc = VIRT_MACHINE_GET_CLASS(vms);
@@ -1678,10 +1678,25 @@ static void virt_2_11_instance_init(Object *obj) 
    vms->irqmap = a15irqmap;

    vms->irqmap = a15irqmap;

}

}





static void virt_machine_2_12_options(MachineClass *mc)

{

}

DEFINE_VIRT_MACHINE_AS_LATEST(2, 12)



#define VIRT_COMPAT_2_11 \

    HW_COMPAT_2_11



static void virt_2_11_instance_init(Object *obj)

{

    virt_2_12_instance_init(obj);

}



static void virt_machine_2_11_options(MachineClass *mc)

static void virt_machine_2_11_options(MachineClass *mc)

{

{

    virt_machine_2_12_options(mc);

    SET_MACHINE_COMPAT(mc, VIRT_COMPAT_2_11);

}

}

DEFINE_VIRT_MACHINE_AS_LATEST(2, 11)

DEFINE_VIRT_MACHINE(2, 11)





#define VIRT_COMPAT_2_10 \

#define VIRT_COMPAT_2_10 \

    HW_COMPAT_2_10

    HW_COMPAT_2_10

hw/intc/armv7m_nvic.c

+22 −16
Original line number Original line Diff line number Diff line
@@ -896,13 +896,6 @@ static uint32_t nvic_readl(NVICState *s, uint32_t offset, MemTxAttrs attrs) 
            val |= (1 << 8);

            val |= (1 << 8);

        }

        }

        return val;

        return val;

    case 0xd28: /* Configurable Fault Status.  */

        /* The BFSR bits [15:8] are shared between security states

         * and we store them in the NS copy

         */

        val = cpu->env.v7m.cfsr[attrs.secure];

        val |= cpu->env.v7m.cfsr[M_REG_NS] & R_V7M_CFSR_BFSR_MASK;

        return val;

    case 0xd2c: /* Hard Fault Status.  */

    case 0xd2c: /* Hard Fault Status.  */

        return cpu->env.v7m.hfsr;

        return cpu->env.v7m.hfsr;

    case 0xd30: /* Debug Fault Status.  */

    case 0xd30: /* Debug Fault Status.  */
@@ -1280,15 +1273,6 @@ static void nvic_writel(NVICState *s, uint32_t offset, uint32_t value, 
        s->vectors[ARMV7M_EXCP_DEBUG].active = (value & (1 << 8)) != 0;

        s->vectors[ARMV7M_EXCP_DEBUG].active = (value & (1 << 8)) != 0;

        nvic_irq_update(s);

        nvic_irq_update(s);

        break;

        break;

    case 0xd28: /* Configurable Fault Status.  */

        cpu->env.v7m.cfsr[attrs.secure] &= ~value; /* W1C */

        if (attrs.secure) {

            /* The BFSR bits [15:8] are shared between security states

             * and we store them in the NS copy.

             */

            cpu->env.v7m.cfsr[M_REG_NS] &= ~(value & R_V7M_CFSR_BFSR_MASK);

        }

        break;

    case 0xd2c: /* Hard Fault Status.  */

    case 0xd2c: /* Hard Fault Status.  */

        cpu->env.v7m.hfsr &= ~value; /* W1C */

        cpu->env.v7m.hfsr &= ~value; /* W1C */

        break;

        break;
@@ -1667,6 +1651,14 @@ static MemTxResult nvic_sysreg_read(void *opaque, hwaddr addr, 
            val = deposit32(val, i * 8, 8, get_prio(s, hdlidx, sbank));

            val = deposit32(val, i * 8, 8, get_prio(s, hdlidx, sbank));

        }

        }

        break;

        break;

    case 0xd28 ... 0xd2b: /* Configurable Fault Status (CFSR) */

        /* The BFSR bits [15:8] are shared between security states

         * and we store them in the NS copy

         */

        val = s->cpu->env.v7m.cfsr[attrs.secure];

        val |= s->cpu->env.v7m.cfsr[M_REG_NS] & R_V7M_CFSR_BFSR_MASK;

        val = extract32(val, (offset - 0xd28) * 8, size * 8);

        break;

    case 0xfe0 ... 0xfff: /* ID.  */

    case 0xfe0 ... 0xfff: /* ID.  */

        if (offset & 3) {

        if (offset & 3) {

            val = 0;

            val = 0;
@@ -1765,6 +1757,20 @@ static MemTxResult nvic_sysreg_write(void *opaque, hwaddr addr, 
        }

        }

        nvic_irq_update(s);

        nvic_irq_update(s);

        return MEMTX_OK;

        return MEMTX_OK;

    case 0xd28 ... 0xd2b: /* Configurable Fault Status (CFSR) */

        /* All bits are W1C, so construct 32 bit value with 0s in

         * the parts not written by the access size

         */

        value <<= ((offset - 0xd28) * 8);



        s->cpu->env.v7m.cfsr[attrs.secure] &= ~value;

        if (attrs.secure) {

            /* The BFSR bits [15:8] are shared between security states

             * and we store them in the NS copy.

             */

            s->cpu->env.v7m.cfsr[M_REG_NS] &= ~(value & R_V7M_CFSR_BFSR_MASK);

        }

        return MEMTX_OK;

    }

    }

    if (size == 4) {

    if (size == 4) {

        nvic_writel(s, offset, value, attrs);

        nvic_writel(s, offset, value, attrs);

hw/sd/milkymist-memcard.c

+4 −0
Original line number Original line Diff line number Diff line
@@ -248,6 +248,10 @@ static void milkymist_memcard_reset(DeviceState *d) 
    for (i = 0; i < R_MAX; i++) {

    for (i = 0; i < R_MAX; i++) {

        s->regs[i] = 0;

        s->regs[i] = 0;

    }

    }

    /* Since we're still using the legacy SD API the card is not plugged

     * into any bus, and we must reset it manually.

     */

    device_reset(DEVICE(s->card));

}

}





static int milkymist_memcard_init(SysBusDevice *dev)

static int milkymist_memcard_init(SysBusDevice *dev)

hw/sd/omap_mmc.c

+10 −4
Original line number Original line Diff line number Diff line
@@ -305,6 +305,12 @@ void omap_mmc_reset(struct omap_mmc_s *host) 
    host->cdet_enable = 0;

    host->cdet_enable = 0;

    qemu_set_irq(host->coverswitch, host->cdet_state);

    qemu_set_irq(host->coverswitch, host->cdet_state);

    host->clkdiv = 0;

    host->clkdiv = 0;



    /* Since we're still using the legacy SD API the card is not plugged

     * into any bus, and we must reset it manually. When omap_mmc is

     * QOMified this must move into the QOM reset function.

     */

    device_reset(DEVICE(host->card));

}

}





static uint64_t omap_mmc_read(void *opaque, hwaddr offset,

static uint64_t omap_mmc_read(void *opaque, hwaddr offset,
@@ -587,8 +593,6 @@ struct omap_mmc_s *omap_mmc_init(hwaddr base, 
    s->lines = 1;	/* TODO: needs to be settable per-board */

    s->lines = 1;	/* TODO: needs to be settable per-board */

    s->rev = 1;

    s->rev = 1;





    omap_mmc_reset(s);



    memory_region_init_io(&s->iomem, NULL, &omap_mmc_ops, s, "omap.mmc", 0x800);

    memory_region_init_io(&s->iomem, NULL, &omap_mmc_ops, s, "omap.mmc", 0x800);

    memory_region_add_subregion(sysmem, base, &s->iomem);

    memory_region_add_subregion(sysmem, base, &s->iomem);
@@ -598,6 +602,8 @@ struct omap_mmc_s *omap_mmc_init(hwaddr base, 
        exit(1);

        exit(1);

    }

    }





    omap_mmc_reset(s);



    return s;

    return s;

}

}
@@ -613,8 +619,6 @@ struct omap_mmc_s *omap2_mmc_init(struct omap_target_agent_s *ta, 
    s->lines = 4;

    s->lines = 4;

    s->rev = 2;

    s->rev = 2;





    omap_mmc_reset(s);



    memory_region_init_io(&s->iomem, NULL, &omap_mmc_ops, s, "omap.mmc",

    memory_region_init_io(&s->iomem, NULL, &omap_mmc_ops, s, "omap.mmc",

                          omap_l4_region_size(ta, 0));

                          omap_l4_region_size(ta, 0));

    omap_l4_attach(ta, 0, &s->iomem);

    omap_l4_attach(ta, 0, &s->iomem);
@@ -628,6 +632,8 @@ struct omap_mmc_s *omap2_mmc_init(struct omap_target_agent_s *ta, 
    s->cdet = qemu_allocate_irq(omap_mmc_cover_cb, s, 0);

    s->cdet = qemu_allocate_irq(omap_mmc_cover_cb, s, 0);

    sd_set_cb(s->card, NULL, s->cdet);

    sd_set_cb(s->card, NULL, s->cdet);





    omap_mmc_reset(s);



    return s;

    return s;

}

}

hw/sd/pl181.c

+4 −0
Original line number Original line Diff line number Diff line
@@ -480,6 +480,10 @@ static void pl181_reset(DeviceState *d) 




    /* We can assume our GPIO outputs have been wired up now */

    /* We can assume our GPIO outputs have been wired up now */

    sd_set_cb(s->card, s->cardstatus[0], s->cardstatus[1]);

    sd_set_cb(s->card, s->cardstatus[0], s->cardstatus[1]);

    /* Since we're still using the legacy SD API the card is not plugged

     * into any bus, and we must reset it manually.

     */

    device_reset(DEVICE(s->card));

}

}





static void pl181_init(Object *obj)

static void pl181_init(Object *obj)