Commit aa7d461a authored by Christoffer Dall's avatar Christoffer Dall Committed by Peter Maydell
Browse files

arm_gic: Support setting/getting binary point reg 



Add a binary_point field to the gic emulation structure and support
setting/getting this register now when we have it.  We don't actually
support interrupt grouping yet, oh well.

Reviewed-by: default avatarPeter Maydell <peter.maydell@linaro.org>
Signed-off-by: default avatarChristoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parent 40d22500

hw/intc/arm_gic.c

+9 −3
Original line number Diff line number Diff line
@@ -669,14 +669,15 @@ static uint32_t gic_cpu_read(GICState *s, int cpu, int offset) 
    case 0x04: /* Priority mask */

        return s->priority_mask[cpu];

    case 0x08: /* Binary Point */

        /* ??? Not implemented.  */

        return 0;

        return s->bpr[cpu];

    case 0x0c: /* Acknowledge */

        return gic_acknowledge_irq(s, cpu);

    case 0x14: /* Running Priority */

        return s->running_priority[cpu];

    case 0x18: /* Highest Pending Interrupt */

        return s->current_pending[cpu];

    case 0x1c: /* Aliased Binary Point */

        return s->abpr[cpu];

    default:

        qemu_log_mask(LOG_GUEST_ERROR,

                      "gic_cpu_read: Bad offset %x\n", (int)offset);
@@ -695,10 +696,15 @@ static void gic_cpu_write(GICState *s, int cpu, int offset, uint32_t value) 
        s->priority_mask[cpu] = (value & 0xff);

        break;

    case 0x08: /* Binary Point */

        /* ??? Not implemented.  */

        s->bpr[cpu] = (value & 0x7);

        break;

    case 0x10: /* End Of Interrupt */

        return gic_complete_irq(s, cpu, value & 0x3ff);

    case 0x1c: /* Aliased Binary Point */

        if (s->revision >= 2) {

            s->abpr[cpu] = (value & 0x7);

        }

        break;

    default:

        qemu_log_mask(LOG_GUEST_ERROR,

                      "gic_cpu_write: Bad offset %x\n", (int)offset);

hw/intc/arm_gic_common.c

+4 −2
Original line number Diff line number Diff line
@@ -58,8 +58,8 @@ static const VMStateDescription vmstate_gic_irq_state = { 


static const VMStateDescription vmstate_gic = {

    .name = "arm_gic",

    .version_id = 5,

    .minimum_version_id = 5,

    .version_id = 6,

    .minimum_version_id = 6,

    .pre_save = gic_pre_save,

    .post_load = gic_post_load,

    .fields = (VMStateField[]) {
@@ -76,6 +76,8 @@ static const VMStateDescription vmstate_gic = { 
        VMSTATE_UINT16_ARRAY(running_irq, GICState, GIC_NCPU),

        VMSTATE_UINT16_ARRAY(running_priority, GICState, GIC_NCPU),

        VMSTATE_UINT16_ARRAY(current_pending, GICState, GIC_NCPU),

        VMSTATE_UINT8_ARRAY(bpr, GICState, GIC_NCPU),

        VMSTATE_UINT8_ARRAY(abpr, GICState, GIC_NCPU),

        VMSTATE_END_OF_LIST()

    }

};

include/hw/intc/arm_gic_common.h

+7 −0
Original line number Diff line number Diff line
@@ -68,6 +68,13 @@ typedef struct GICState { 
    uint16_t running_priority[GIC_NCPU];

    uint16_t current_pending[GIC_NCPU];



    /* We present the GICv2 without security extensions to a guest and

     * therefore the guest can configure the GICC_CTLR to configure group 1

     * binary point in the abpr.

     */

    uint8_t  bpr[GIC_NCPU];

    uint8_t  abpr[GIC_NCPU];



    uint32_t num_cpu;



    MemoryRegion iomem; /* Distributor */