Commit a9779a3a authored by Markus Armbruster's avatar Markus Armbruster Committed by Stefan Hajnoczi
Browse files

trace-events: Delete unused trace points 



Tracked down with cleanup-trace-events.pl.  Funnies requiring manual
post-processing:

* block.c and blockdev.c trace points are in block/trace-events.

* hw/block/nvme.c uses the preprocessor to hide its trace point use
  from cleanup-trace-events.pl.

* include/hw/xen/xen_common.h trace points are in hw/xen/trace-events.

* net/colo-compare and net/filter-rewriter.c use pseudo trace points
  colo_compare_udp_miscompare and colo_filter_rewriter_debug to guard
  debug code.

Signed-off-by: default avatarMarkus Armbruster <armbru@redhat.com>
Message-id: 20190314180929.27722-5-armbru@redhat.com
Message-Id: <20190314180929.27722-5-armbru@redhat.com>
Signed-off-by: default avatarStefan Hajnoczi <stefanha@redhat.com>
parent a44cf524

block/trace-events

+0 −1
Original line number Diff line number Diff line
@@ -57,7 +57,6 @@ qmp_block_stream(void *bs, void *job) "bs %p job %p" 


# file-posix.c

# file-win32.c

file_paio_submit_co(int64_t offset, int count, int type) "offset %"PRId64" count %d type %d"

file_paio_submit(void *acb, void *opaque, int64_t offset, int count, int type) "acb %p opaque %p offset %"PRId64" count %d type %d"

file_copy_file_range(void *bs, int src, int64_t src_off, int dst, int64_t dst_off, int64_t bytes, int flags, int64_t ret) "bs %p src_fd %d offset %"PRIu64" dst_fd %d offset %"PRIu64" bytes %"PRIu64" flags %d ret %"PRId64

hw/arm/trace-events

+0 −7
Original line number Diff line number Diff line
@@ -5,8 +5,6 @@ virt_acpi_setup(void) "No fw cfg or ACPI disabled. Bailing out." 


# smmu-common.c

smmu_add_mr(const char *name) "%s"

smmu_page_walk(int stage, uint64_t baseaddr, int first_level, uint64_t start, uint64_t end) "stage=%d, baseaddr=0x%"PRIx64", first level=%d, start=0x%"PRIx64", end=0x%"PRIx64

smmu_lookup_table(int level, uint64_t baseaddr, int granule_sz, uint64_t start, uint64_t end, int flags, uint64_t subpage_size) "level=%d baseaddr=0x%"PRIx64" granule=%d, start=0x%"PRIx64" end=0x%"PRIx64" flags=%d subpage_size=0x%"PRIx64

smmu_ptw_level(int level, uint64_t iova, size_t subpage_size, uint64_t baseaddr, uint32_t offset, uint64_t pte) "level=%d iova=0x%"PRIx64" subpage_sz=0x%zx baseaddr=0x%"PRIx64" offset=%d => pte=0x%"PRIx64

smmu_ptw_invalid_pte(int stage, int level, uint64_t baseaddr, uint64_t pteaddr, uint32_t offset, uint64_t pte) "stage=%d level=%d base@=0x%"PRIx64" pte@=0x%"PRIx64" offset=%d pte=0x%"PRIx64

smmu_ptw_page_pte(int stage, int level,  uint64_t iova, uint64_t baseaddr, uint64_t pteaddr, uint64_t pte, uint64_t address) "stage=%d level=%d iova=0x%"PRIx64" base@=0x%"PRIx64" pte@=0x%"PRIx64" pte=0x%"PRIx64" page address = 0x%"PRIx64
@@ -29,12 +27,7 @@ smmuv3_cmdq_consume(uint32_t prod, uint32_t cons, uint8_t prod_wrap, uint8_t con 
smmuv3_cmdq_opcode(const char *opcode) "<--- %s"

smmuv3_cmdq_consume_out(uint32_t prod, uint32_t cons, uint8_t prod_wrap, uint8_t cons_wrap) "prod:%d, cons:%d, prod_wrap:%d, cons_wrap:%d "

smmuv3_cmdq_consume_error(const char *cmd_name, uint8_t cmd_error) "Error on %s command execution: %d"

smmuv3_update(bool is_empty, uint32_t prod, uint32_t cons, uint8_t prod_wrap, uint8_t cons_wrap) "q empty:%d prod:%d cons:%d p.wrap:%d p.cons:%d"

smmuv3_update_check_cmd(int error) "cmdq not enabled or error :0x%x"

smmuv3_write_mmio(uint64_t addr, uint64_t val, unsigned size, uint32_t r) "addr: 0x%"PRIx64" val:0x%"PRIx64" size: 0x%x(%d)"

smmuv3_write_mmio_idr(uint64_t addr, uint64_t val) "write to RO/Unimpl reg 0x%"PRIx64" val64:0x%"PRIx64

smmuv3_write_mmio_evtq_cons_bef_clear(uint32_t prod, uint32_t cons, uint8_t prod_wrap, uint8_t cons_wrap) "Before clearing interrupt prod:0x%x cons:0x%x prod.w:%d cons.w:%d"

smmuv3_write_mmio_evtq_cons_after_clear(uint32_t prod, uint32_t cons, uint8_t prod_wrap, uint8_t cons_wrap) "after clearing interrupt prod:0x%x cons:0x%x prod.w:%d cons.w:%d"

smmuv3_record_event(const char *type, uint32_t sid) "%s sid=%d"

smmuv3_find_ste(uint16_t sid, uint32_t features, uint16_t sid_split) "SID:0x%x features:0x%x, sid_split:0x%x"

smmuv3_find_ste_2lvl(uint64_t strtab_base, uint64_t l1ptr, int l1_ste_offset, uint64_t l2ptr, int l2_ste_offset, int max_l2_ste) "strtab_base:0x%"PRIx64" l1ptr:0x%"PRIx64" l1_off:0x%x, l2ptr:0x%"PRIx64" l2_off:0x%x max_l2_ste:%d"

hw/block/trace-events

+0 −2
Original line number Diff line number Diff line
@@ -63,9 +63,7 @@ nvme_err_invalid_dma(void) "PRP/SGL is too small for transfer size" 
nvme_err_invalid_prplist_ent(uint64_t prplist) "PRP list entry is null or not page aligned: 0x%"PRIx64""

nvme_err_invalid_prp2_align(uint64_t prp2) "PRP2 is not page aligned: 0x%"PRIx64""

nvme_err_invalid_prp2_missing(void) "PRP2 is null and more data to be transferred"

nvme_err_invalid_field(void) "invalid field"

nvme_err_invalid_prp(void) "invalid PRP"

nvme_err_invalid_sgl(void) "invalid SGL"

nvme_err_invalid_ns(uint32_t ns, uint32_t limit) "invalid namespace %u not within 1-%u"

nvme_err_invalid_opc(uint8_t opc) "invalid opcode 0x%"PRIx8""

nvme_err_invalid_admin_opc(uint8_t opc) "invalid admin opcode 0x%"PRIx8""

hw/display/trace-events

+0 −1
Original line number Diff line number Diff line
@@ -131,7 +131,6 @@ vga_vbe_write(uint32_t index, uint32_t val) "index 0x%x, val 0x%x" 
# cirrus_vga.c

vga_cirrus_read_io(uint32_t addr, uint32_t val) "addr 0x%x, val 0x%x"

vga_cirrus_write_io(uint32_t addr, uint32_t val) "addr 0x%x, val 0x%x"

vga_cirrus_read_blt(uint32_t offset, uint32_t val) "offset 0x%x, val 0x%x"

vga_cirrus_write_blt(uint32_t offset, uint32_t val) "offset 0x%x, val 0x%x"



# sii9022.c

hw/i386/trace-events

+0 −2
Original line number Diff line number Diff line
@@ -106,8 +106,6 @@ amdvi_ir_err(const char *str) "%s" 
amdvi_ir_intctl(uint8_t val) "int_ctl 0x%"PRIx8

amdvi_ir_target_abort(const char *str) "%s"

amdvi_ir_delivery_mode(const char *str) "%s"

amdvi_ir_generate_msi_message(uint8_t vector, uint8_t delivery_mode, uint8_t dest_mode, uint8_t dest, uint8_t rh) "vector %d delivery-mode %d dest-mode %d dest-id %d rh %d"

amdvi_ir_irte_ga(uint64_t addr, uint64_t data) "addr 0x%"PRIx64" offset 0x%"PRIx64

amdvi_ir_irte_ga_val(uint64_t hi, uint64_t lo) "hi 0x%"PRIx64" lo 0x%"PRIx64



# vmport.c