Loading hw/nvram/mac_nvram.c +0 −23 Original line number Diff line number Diff line Loading @@ -39,29 +39,6 @@ #define DEF_SYSTEM_SIZE 0xc10 /* Direct access to NVRAM */ uint8_t macio_nvram_read(MacIONVRAMState *s, uint32_t addr) { uint32_t ret; if (addr < s->size) { ret = s->data[addr]; } else { ret = -1; } NVR_DPRINTF("read addr %04" PRIx32 " val %" PRIx8 "\n", addr, ret); return ret; } void macio_nvram_write(MacIONVRAMState *s, uint32_t addr, uint8_t val) { NVR_DPRINTF("write addr %04" PRIx32 " val %" PRIx8 "\n", addr, val); if (addr < s->size) { s->data[addr] = val; } } /* macio style NVRAM device */ static void macio_nvram_writeb(void *opaque, hwaddr addr, uint64_t value, unsigned size) Loading hw/ppc/mac.h +0 −2 Original line number Diff line number Diff line Loading @@ -178,6 +178,4 @@ typedef struct MacIONVRAMState { } MacIONVRAMState; void pmac_format_nvram_partition (MacIONVRAMState *nvr, int len); uint8_t macio_nvram_read(MacIONVRAMState *s, uint32_t addr); void macio_nvram_write(MacIONVRAMState *s, uint32_t addr, uint8_t val); #endif /* !defined(__PPC_MAC_H__) */ Loading
hw/nvram/mac_nvram.c +0 −23 Original line number Diff line number Diff line Loading @@ -39,29 +39,6 @@ #define DEF_SYSTEM_SIZE 0xc10 /* Direct access to NVRAM */ uint8_t macio_nvram_read(MacIONVRAMState *s, uint32_t addr) { uint32_t ret; if (addr < s->size) { ret = s->data[addr]; } else { ret = -1; } NVR_DPRINTF("read addr %04" PRIx32 " val %" PRIx8 "\n", addr, ret); return ret; } void macio_nvram_write(MacIONVRAMState *s, uint32_t addr, uint8_t val) { NVR_DPRINTF("write addr %04" PRIx32 " val %" PRIx8 "\n", addr, val); if (addr < s->size) { s->data[addr] = val; } } /* macio style NVRAM device */ static void macio_nvram_writeb(void *opaque, hwaddr addr, uint64_t value, unsigned size) Loading
hw/ppc/mac.h +0 −2 Original line number Diff line number Diff line Loading @@ -178,6 +178,4 @@ typedef struct MacIONVRAMState { } MacIONVRAMState; void pmac_format_nvram_partition (MacIONVRAMState *nvr, int len); uint8_t macio_nvram_read(MacIONVRAMState *s, uint32_t addr); void macio_nvram_write(MacIONVRAMState *s, uint32_t addr, uint8_t val); #endif /* !defined(__PPC_MAC_H__) */