Commit a790e82b authored by Benjamin Herrenschmidt's avatar Benjamin Herrenschmidt Committed by David Gibson
Browse files

target/ppc: Add POWER9 exception model 



And use it to get the correct HILE bit in HID0

Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: default avatarCédric Le Goater <clg@kaod.org>
Reviewed-by: default avatarDavid Gibson <david@gibson.dropbear.id.au>
Message-Id: <20190215161648.9600-7-clg@kaod.org>
Signed-off-by: default avatarDavid Gibson <david@gibson.dropbear.id.au>
parent 1e7fd61d

target/ppc/cpu-qom.h

+2 −0
Original line number Diff line number Diff line
@@ -113,6 +113,8 @@ enum powerpc_excp_t { 
    POWERPC_EXCP_POWER7,

    /* POWER8 exception model           */

    POWERPC_EXCP_POWER8,

    /* POWER9 exception model           */

    POWERPC_EXCP_POWER9,

};



/*****************************************************************************/

target/ppc/excp_helper.c

+13 −4
Original line number Diff line number Diff line
@@ -147,7 +147,7 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int excp_model, int excp) 


    /* Exception targetting modifiers

     *

     * LPES0 is supported on POWER7/8

     * LPES0 is supported on POWER7/8/9

     * LPES1 is not supported (old iSeries mode)

     *

     * On anything else, we behave as if LPES0 is 1
@@ -158,9 +158,10 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int excp_model, int excp) 
     */

#if defined(TARGET_PPC64)

    if (excp_model == POWERPC_EXCP_POWER7 ||

        excp_model == POWERPC_EXCP_POWER8) {

        excp_model == POWERPC_EXCP_POWER8 ||

        excp_model == POWERPC_EXCP_POWER9) {

        lpes0 = !!(env->spr[SPR_LPCR] & LPCR_LPES0);

        if (excp_model == POWERPC_EXCP_POWER8) {

        if (excp_model != POWERPC_EXCP_POWER7) {

            ail = (env->spr[SPR_LPCR] & LPCR_AIL) >> LPCR_AIL_SHIFT;

        } else {

            ail = 0;
@@ -662,7 +663,15 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int excp_model, int excp) 
        }

    } else if (excp_model == POWERPC_EXCP_POWER8) {

        if (new_msr & MSR_HVB) {

            if (env->spr[SPR_HID0] & (HID0_HILE | HID0_POWER9_HILE)) {

            if (env->spr[SPR_HID0] & HID0_HILE) {

                new_msr |= (target_ulong)1 << MSR_LE;

            }

        } else if (env->spr[SPR_LPCR] & LPCR_ILE) {

            new_msr |= (target_ulong)1 << MSR_LE;

        }

    } else if (excp_model == POWERPC_EXCP_POWER9) {

        if (new_msr & MSR_HVB) {

            if (env->spr[SPR_HID0] & HID0_POWER9_HILE) {

                new_msr |= (target_ulong)1 << MSR_LE;

            }

        } else if (env->spr[SPR_LPCR] & LPCR_ILE) {

target/ppc/translate.c

+2 −1
Original line number Diff line number Diff line
@@ -7481,7 +7481,8 @@ void ppc_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, 


#if defined(TARGET_PPC64)

    if (env->excp_model == POWERPC_EXCP_POWER7 ||

        env->excp_model == POWERPC_EXCP_POWER8) {

        env->excp_model == POWERPC_EXCP_POWER8 ||

        env->excp_model == POWERPC_EXCP_POWER9)  {

        cpu_fprintf(f, "HSRR0 " TARGET_FMT_lx " HSRR1 " TARGET_FMT_lx "\n",

                    env->spr[SPR_HSRR0], env->spr[SPR_HSRR1]);

    }

target/ppc/translate_init.inc.c

+1 −1
Original line number Diff line number Diff line
@@ -8905,7 +8905,7 @@ POWERPC_FAMILY(POWER9)(ObjectClass *oc, void *data) 
    pcc->hash64_opts = &ppc_hash64_opts_POWER7;

    pcc->radix_page_info = &POWER9_radix_page_info;

#endif

    pcc->excp_model = POWERPC_EXCP_POWER8;

    pcc->excp_model = POWERPC_EXCP_POWER9;

    pcc->bus_model = PPC_FLAGS_INPUT_POWER7;

    pcc->bfd_mach = bfd_mach_ppc64;

    pcc->flags = POWERPC_FLAG_VRE | POWERPC_FLAG_SE |