Loading target-sparc/helper.c +8 −8 Original line number Diff line number Diff line Loading @@ -87,14 +87,14 @@ int cpu_sparc_handle_mmu_fault(CPUState *env1, target_ulong address, int rw, * Sparc V8 Reference MMU (SRMMU) */ static const int access_table[8][8] = { { 0, 0, 0, 0, 2, 0, 3, 3 }, { 0, 0, 0, 0, 2, 0, 0, 0 }, { 2, 2, 0, 0, 0, 2, 3, 3 }, { 2, 2, 0, 0, 0, 2, 0, 0 }, { 2, 0, 2, 0, 2, 2, 3, 3 }, { 2, 0, 2, 0, 2, 0, 2, 0 }, { 2, 2, 2, 0, 2, 2, 3, 3 }, { 2, 2, 2, 0, 2, 2, 2, 0 } { 0, 0, 0, 0, 8, 0, 12, 12 }, { 0, 0, 0, 0, 8, 0, 0, 0 }, { 8, 8, 0, 0, 0, 8, 12, 12 }, { 8, 8, 0, 0, 0, 8, 0, 0 }, { 8, 0, 8, 0, 8, 8, 12, 12 }, { 8, 0, 8, 0, 8, 0, 8, 0 }, { 8, 8, 8, 0, 8, 8, 12, 12 }, { 8, 8, 8, 0, 8, 8, 8, 0 } }; static const int perm_table[2][8] = { Loading Loading
target-sparc/helper.c +8 −8 Original line number Diff line number Diff line Loading @@ -87,14 +87,14 @@ int cpu_sparc_handle_mmu_fault(CPUState *env1, target_ulong address, int rw, * Sparc V8 Reference MMU (SRMMU) */ static const int access_table[8][8] = { { 0, 0, 0, 0, 2, 0, 3, 3 }, { 0, 0, 0, 0, 2, 0, 0, 0 }, { 2, 2, 0, 0, 0, 2, 3, 3 }, { 2, 2, 0, 0, 0, 2, 0, 0 }, { 2, 0, 2, 0, 2, 2, 3, 3 }, { 2, 0, 2, 0, 2, 0, 2, 0 }, { 2, 2, 2, 0, 2, 2, 3, 3 }, { 2, 2, 2, 0, 2, 2, 2, 0 } { 0, 0, 0, 0, 8, 0, 12, 12 }, { 0, 0, 0, 0, 8, 0, 0, 0 }, { 8, 8, 0, 0, 0, 8, 12, 12 }, { 8, 8, 0, 0, 0, 8, 0, 0 }, { 8, 0, 8, 0, 8, 8, 12, 12 }, { 8, 0, 8, 0, 8, 0, 8, 0 }, { 8, 8, 8, 0, 8, 8, 12, 12 }, { 8, 8, 8, 0, 8, 8, 8, 0 } }; static const int perm_table[2][8] = { Loading