Commit a538626a authored by Peter Maydell's avatar Peter Maydell
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Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20190709' into staging 



Minor gvec fix for as-yet uncommitted altivec host.
Build fix for riscv host.

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# gpg:                using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg:                issuer "richard.henderson@linaro.org"
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* remotes/rth/tags/pull-tcg-20190709:
  tcg: Fix expansion of INDEX_op_not_vec
  tcg/riscv: Fix RISC-VH host build failure

Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parents f34edbc7 11978f6f

tcg/riscv/tcg-target.inc.c

+2 −2
Original line number Diff line number Diff line
@@ -980,8 +980,8 @@ static void tcg_out_tlb_load(TCGContext *s, TCGReg addrl, 
    int table_ofs = fast_ofs + offsetof(CPUTLBDescFast, table);

    TCGReg mask_base = TCG_AREG0, table_base = TCG_AREG0;



    tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_TMP0, mask_base, mask_off);

    tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_TMP1, table_base, table_off);

    tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_TMP0, mask_base, mask_ofs);

    tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_TMP1, table_base, table_ofs);



    tcg_out_opc_imm(s, OPC_SRLI, TCG_REG_TMP2, addrl,

                    TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS);

tcg/tcg-op-vec.c

+6 −0
Original line number Diff line number Diff line
@@ -90,6 +90,9 @@ bool tcg_can_emit_vecop_list(const TCGOpcode *list, 
        case INDEX_op_bitsel_vec:

            /* These opcodes are mandatory and should not be listed.  */

            g_assert_not_reached();

        case INDEX_op_not_vec:

            /* These opcodes have generic expansions using the above.  */

            g_assert_not_reached();

        default:

            break;

        }
@@ -438,11 +441,14 @@ static bool do_op2(unsigned vece, TCGv_vec r, TCGv_vec a, TCGOpcode opc) 


void tcg_gen_not_vec(unsigned vece, TCGv_vec r, TCGv_vec a)

{

    const TCGOpcode *hold_list = tcg_swap_vecop_list(NULL);



    if (!TCG_TARGET_HAS_not_vec || !do_op2(vece, r, a, INDEX_op_not_vec)) {

        TCGv_vec t = tcg_const_ones_vec_matching(r);

        tcg_gen_xor_vec(0, r, a, t);

        tcg_temp_free_vec(t);

    }

    tcg_swap_vecop_list(hold_list);

}



void tcg_gen_neg_vec(unsigned vece, TCGv_vec r, TCGv_vec a)