Commit a4cbd0da authored by Aleksandar Markovic's avatar Aleksandar Markovic
Browse files

target/mips: Style improvements in mips_fulong2e.c 



Fixes mostly errors and warnings reported by 'checkpatch.pl -f'.

Signed-off-by: default avatarAleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: default avatarAleksandar Rikalo <arikalo@wavecomp.com>
Message-Id: <1566216496-17375-14-git-send-email-aleksandar.markovic@rt-rk.com>
parent f5c3fbfc

hw/mips/mips_fulong2e.c

+58 −38
Original line number Diff line number Diff line
@@ -89,8 +89,9 @@ static void GCC_FMT_ATTR(3, 4) prom_set(uint32_t* prom_buf, int index, 
    va_list ap;

    int32_t table_addr;



    if (index >= ENVP_NB_ENTRIES)

    if (index >= ENVP_NB_ENTRIES) {

        return;

    }



    if (string == NULL) {

        prom_buf[index] = 0;
@@ -132,14 +133,16 @@ static int64_t load_kernel (CPUMIPSState *env) 
    if (loaderparams.initrd_filename) {

        initrd_size = get_image_size(loaderparams.initrd_filename);

        if (initrd_size > 0) {

            initrd_offset = (kernel_high + ~INITRD_PAGE_MASK) & INITRD_PAGE_MASK;

            initrd_offset = (kernel_high + ~INITRD_PAGE_MASK) &

                            INITRD_PAGE_MASK;

            if (initrd_offset + initrd_size > ram_size) {

                error_report("memory too small for initial ram disk '%s'",

                             loaderparams.initrd_filename);

                exit(1);

            }

            initrd_size = load_image_targphys(loaderparams.initrd_filename,

                                     initrd_offset, ram_size - initrd_offset);

                                              initrd_offset,

                                              ram_size - initrd_offset);

        }

        if (initrd_size == (target_ulong) -1) {

            error_report("could not load initial ram disk '%s'",
@@ -154,9 +157,10 @@ static int64_t load_kernel (CPUMIPSState *env) 


    prom_set(prom_buf, index++, "%s", loaderparams.kernel_filename);

    if (initrd_size > 0) {

        prom_set(prom_buf, index++, "rd_start=0x%" PRIx64 " rd_size=%" PRId64 " %s",

                 cpu_mips_phys_to_kseg0(NULL, initrd_offset), initrd_size,

                 loaderparams.kernel_cmdline);

        prom_set(prom_buf, index++,

                 "rd_start=0x%" PRIx64 " rd_size=%" PRId64 " %s",

                 cpu_mips_phys_to_kseg0(NULL, initrd_offset),

                 initrd_size, loaderparams.kernel_cmdline);

    } else {

        prom_set(prom_buf, index++, "%s", loaderparams.kernel_cmdline);

    }
@@ -175,34 +179,48 @@ static int64_t load_kernel (CPUMIPSState *env) 
    return kernel_entry;

}



static void write_bootloader (CPUMIPSState *env, uint8_t *base, int64_t kernel_addr)

static void write_bootloader(CPUMIPSState *env, uint8_t *base,

                             int64_t kernel_addr)

{

    uint32_t *p;



    /* Small bootloader */

    p = (uint32_t *)base;



    stl_p(p++, 0x0bf00010);                                      /* j 0x1fc00040 */

    stl_p(p++, 0x00000000);                                      /* nop */

    /* j 0x1fc00040 */

    stl_p(p++, 0x0bf00010);

    /* nop */

    stl_p(p++, 0x00000000);



    /* Second part of the bootloader */

    p = (uint32_t *)(base + 0x040);



    stl_p(p++, 0x3c040000);                                      /* lui a0, 0 */

    stl_p(p++, 0x34840002);                                      /* ori a0, a0, 2 */

    stl_p(p++, 0x3c050000 | ((ENVP_ADDR >> 16) & 0xffff));       /* lui a1, high(ENVP_ADDR) */

    stl_p(p++, 0x34a50000 | (ENVP_ADDR & 0xffff));               /* ori a1, a0, low(ENVP_ADDR) */

    stl_p(p++, 0x3c060000 | (((ENVP_ADDR + 8) >> 16) & 0xffff)); /* lui a2, high(ENVP_ADDR + 8) */

    stl_p(p++, 0x34c60000 | ((ENVP_ADDR + 8) & 0xffff));         /* ori a2, a2, low(ENVP_ADDR + 8) */

    stl_p(p++, 0x3c070000 | (loaderparams.ram_size >> 16));      /* lui a3, high(env->ram_size) */

    stl_p(p++, 0x34e70000 | (loaderparams.ram_size & 0xffff));   /* ori a3, a3, low(env->ram_size) */

    stl_p(p++, 0x3c1f0000 | ((kernel_addr >> 16) & 0xffff));     /* lui ra, high(kernel_addr) */;

    stl_p(p++, 0x37ff0000 | (kernel_addr & 0xffff));             /* ori ra, ra, low(kernel_addr) */

    stl_p(p++, 0x03e00008);                                      /* jr ra */

    stl_p(p++, 0x00000000);                                      /* nop */

    /* lui a0, 0 */

    stl_p(p++, 0x3c040000);

    /* ori a0, a0, 2 */

    stl_p(p++, 0x34840002);

    /* lui a1, high(ENVP_ADDR) */

    stl_p(p++, 0x3c050000 | ((ENVP_ADDR >> 16) & 0xffff));

    /* ori a1, a0, low(ENVP_ADDR) */

    stl_p(p++, 0x34a50000 | (ENVP_ADDR & 0xffff));

    /* lui a2, high(ENVP_ADDR + 8) */

    stl_p(p++, 0x3c060000 | (((ENVP_ADDR + 8) >> 16) & 0xffff));

    /* ori a2, a2, low(ENVP_ADDR + 8) */

    stl_p(p++, 0x34c60000 | ((ENVP_ADDR + 8) & 0xffff));

    /* lui a3, high(env->ram_size) */

    stl_p(p++, 0x3c070000 | (loaderparams.ram_size >> 16));

    /* ori a3, a3, low(env->ram_size) */

    stl_p(p++, 0x34e70000 | (loaderparams.ram_size & 0xffff));

    /* lui ra, high(kernel_addr) */

    stl_p(p++, 0x3c1f0000 | ((kernel_addr >> 16) & 0xffff));

    /* ori ra, ra, low(kernel_addr) */

    stl_p(p++, 0x37ff0000 | (kernel_addr & 0xffff));

    /* jr ra */

    stl_p(p++, 0x03e00008);

    /* nop */

    stl_p(p++, 0x00000000);

}





static void main_cpu_reset(void *opaque)

{

    MIPSCPU *cpu = opaque;
@@ -308,8 +326,10 @@ static void mips_fulong2e_init(MachineState *machine) 
    memory_region_add_subregion(address_space_mem, 0, ram);

    memory_region_add_subregion(address_space_mem, 0x1fc00000LL, bios);



    /* We do not support flash operation, just loading pmon.bin as raw BIOS.

     * Please use -L to set the BIOS path and -bios to set bios name. */

    /*

     * We do not support flash operation, just loading pmon.bin as raw BIOS.

     * Please use -L to set the BIOS path and -bios to set bios name.

     */



    if (kernel_filename) {

        loaderparams.ram_size = ram_size;