Commit a419e22d authored by Chen Gang's avatar Chen Gang Committed by Richard Henderson
Browse files

target-tilegx: Implement v2mults instruction 



Signed-off-by: default avatarChen Gang <gang.chen.5i5j@gmail.com>
Message-Id: <1443956491-26850-3-git-send-email-gang.chen.5i5j@gmail.com>
Signed-off-by: default avatarRichard Henderson <rth@twiddle.net>
parent aaf893a6

target-tilegx/helper.h

+1 −0
Original line number Diff line number Diff line
@@ -16,6 +16,7 @@ DEF_HELPER_FLAGS_2(v2int_h, TCG_CALL_NO_RWG_SE, i64, i64, i64) 
DEF_HELPER_FLAGS_2(v2int_l, TCG_CALL_NO_RWG_SE, i64, i64, i64)



DEF_HELPER_FLAGS_2(v1multu, TCG_CALL_NO_RWG_SE, i64, i64, i64)

DEF_HELPER_FLAGS_2(v2mults, TCG_CALL_NO_RWG_SE, i64, i64, i64)

DEF_HELPER_FLAGS_2(v1shl, TCG_CALL_NO_RWG_SE, i64, i64, i64)

DEF_HELPER_FLAGS_2(v1shru, TCG_CALL_NO_RWG_SE, i64, i64, i64)

DEF_HELPER_FLAGS_2(v1shrs, TCG_CALL_NO_RWG_SE, i64, i64, i64)

target-tilegx/simd_helper.c

+15 −0
Original line number Diff line number Diff line
@@ -41,6 +41,21 @@ uint64_t helper_v1multu(uint64_t a, uint64_t b) 
    return r;

}



uint64_t helper_v2mults(uint64_t a, uint64_t b)

{

    uint64_t r = 0;

    int i;



    /* While the instruction talks about signed inputs, with a

       truncated result the sign of the inputs doesn't matter.  */

    for (i = 0; i < 64; i += 16) {

        unsigned ae = extract64(a, i, 16);

        unsigned be = extract64(b, i, 16);

        r = deposit64(r, i, 16, ae * be);

    }

    return r;

}



uint64_t helper_v1shl(uint64_t a, uint64_t b)

{

    uint64_t m;

target-tilegx/translate.c

+4 −0
Original line number Diff line number Diff line
@@ -1355,7 +1355,11 @@ static TileExcp gen_rrr_opcode(DisasContext *dc, unsigned opext, 
    case OE_RRR(V2MNZ, 0, X1):

    case OE_RRR(V2MULFSC, 0, X0):

    case OE_RRR(V2MULS, 0, X0):

        return TILEGX_EXCP_OPCODE_UNIMPLEMENTED;

    case OE_RRR(V2MULTS, 0, X0):

        gen_helper_v2mults(tdest, tsrca, tsrcb);

        mnemonic = "v2mults";

        break;

    case OE_RRR(V2MZ, 0, X0):

    case OE_RRR(V2MZ, 0, X1):

    case OE_RRR(V2PACKH, 0, X0):