Commit a3f9362a authored by Peter Maydell's avatar Peter Maydell
Browse files

Merge remote-tracking branch 'remotes/mcayland/tags/qemu-sparc-signed' into staging 



qemu-sparc update

# gpg: Signature made Thu 25 Jan 2018 13:44:58 GMT
# gpg:                using RSA key 0x5BC2C56FAE0F321F
# gpg: Good signature from "Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>"
# Primary key fingerprint: CC62 1AB9 8E82 200D 915C  C9C4 5BC2 C56F AE0F 321F

* remotes/mcayland/tags/qemu-sparc-signed:
  sun4u: implement power device
  sparc64: convert hw/sparc64/sparc64.c from DPRINTF macros to trace events
  sabre: convert from SABRE_DPRINTF macro to trace-events
  apb: rename apb.c to sabre.c
  sun4u: rename apb variables and constants
  apb: rename QOM type from TYPE_APB to TYPE_SABRE
  apb: QOMify sabre PCI host bridge
  apb: change pbm_pci_host prefix functions to use sabre_pci prefix
  apb: rename APB functions to use sabre prefix
  simba: rename PBMPCIBridge and QOM types to reflect simba naming
  apb: split simba PCI bridge into hw/pci-bridge/simba.c
  sparc/leon3 irqmp: fix IRQ software ack

Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parents b3bbe959 25c5d5ac

Makefile.objs

+1 −0
Original line number Diff line number Diff line
@@ -150,6 +150,7 @@ trace-events-subdirs += hw/i386/xen 
trace-events-subdirs += hw/9pfs

trace-events-subdirs += hw/ppc

trace-events-subdirs += hw/pci

trace-events-subdirs += hw/pci-host

trace-events-subdirs += hw/s390x

trace-events-subdirs += hw/vfio

trace-events-subdirs += hw/acpi

default-configs/sparc64-softmmu.mak

+2 −1
Original line number Diff line number Diff line
@@ -11,7 +11,8 @@ CONFIG_PCKBD=y 
CONFIG_FDC=y

CONFIG_IDE_ISA=y

CONFIG_IDE_CMD646=y

CONFIG_PCI_APB=y

CONFIG_PCI_SABRE=y

CONFIG_SIMBA=y

CONFIG_SUNHME=y

CONFIG_MC146818RTC=y

CONFIG_ISA_TESTDEV=y

hw/intc/grlib_irqmp.c

+11 −6
Original line number Diff line number Diff line
@@ -106,6 +106,15 @@ static void grlib_irqmp_check_irqs(IRQMPState *state) 
    }

}



static void grlib_irqmp_ack_mask(IRQMPState *state, uint32_t mask)

{

    /* Clear registers */

    state->pending  &= ~mask;

    state->force[0] &= ~mask; /* Only CPU 0 (No SMP support) */



    grlib_irqmp_check_irqs(state);

}



void grlib_irqmp_ack(DeviceState *dev, int intno)

{

    IRQMP        *irqmp = GRLIB_IRQMP(dev);
@@ -120,11 +129,7 @@ void grlib_irqmp_ack(DeviceState *dev, int intno) 


    trace_grlib_irqmp_ack(intno);



    /* Clear registers */

    state->pending  &= ~mask;

    state->force[0] &= ~mask; /* Only CPU 0 (No SMP support) */



    grlib_irqmp_check_irqs(state);

    grlib_irqmp_ack_mask(state, mask);

}



void grlib_irqmp_set_irq(void *opaque, int irq, int level)
@@ -251,7 +256,7 @@ static void grlib_irqmp_write(void *opaque, hwaddr addr, 


    case CLEAR_OFFSET:

        value &= ~1; /* clean up the value */

        state->pending &= ~value;

        grlib_irqmp_ack_mask(state, value);

        return;



    case MP_STATUS_OFFSET:

hw/pci-bridge/Makefile.objs

+2 −0
Original line number Diff line number Diff line
@@ -6,3 +6,5 @@ common-obj-$(CONFIG_IOH3420) += ioh3420.o 
common-obj-$(CONFIG_I82801B11) += i82801b11.o

# NewWorld PowerMac

common-obj-$(CONFIG_DEC_PCI) += dec.o

# Sun4u

common-obj-$(CONFIG_SIMBA) += simba.o

hw/pci-bridge/simba.c

0 → 100644
+101 −0
Original line number Diff line number Diff line 
/*

 * QEMU Simba PCI bridge

 *

 * Copyright (c) 2006 Fabrice Bellard

 * Copyright (c) 2012,2013 Artyom Tarasenko

 * Copyright (c) 2018 Mark Cave-Ayland

 *

 * Permission is hereby granted, free of charge, to any person obtaining a copy

 * of this software and associated documentation files (the "Software"), to deal

 * in the Software without restriction, including without limitation the rights

 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell

 * copies of the Software, and to permit persons to whom the Software is

 * furnished to do so, subject to the following conditions:

 *

 * The above copyright notice and this permission notice shall be included in

 * all copies or substantial portions of the Software.

 *

 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR

 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,

 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL

 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER

 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,

 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN

 * THE SOFTWARE.

 */



#include "qemu/osdep.h"

#include "hw/pci/pci.h"

#include "hw/pci/pci_bridge.h"

#include "hw/pci/pci_bus.h"

#include "hw/pci-bridge/simba.h"



/*

 * Chipset docs:

 * APB: "Advanced PCI Bridge (APB) User's Manual",

 * http://www.sun.com/processors/manuals/805-1251.pdf

 */



static void simba_pci_bridge_realize(PCIDevice *dev, Error **errp)

{

    /*

     * command register:

     * According to PCI bridge spec, after reset

     *   bus master bit is off

     *   memory space enable bit is off

     * According to manual (805-1251.pdf).

     *   the reset value should be zero unless the boot pin is tied high

     *   (which is true) and thus it should be PCI_COMMAND_MEMORY.

     */

    SimbaPCIBridge *br = SIMBA_PCI_BRIDGE(dev);



    pci_bridge_initfn(dev, TYPE_PCI_BUS);



    pci_set_word(dev->config + PCI_COMMAND, PCI_COMMAND_MEMORY);

    pci_set_word(dev->config + PCI_STATUS,

                 PCI_STATUS_FAST_BACK | PCI_STATUS_66MHZ |

                 PCI_STATUS_DEVSEL_MEDIUM);



    /* Allow 32-bit IO addresses */

    pci_set_word(dev->config + PCI_IO_BASE, PCI_IO_RANGE_TYPE_32);

    pci_set_word(dev->config + PCI_IO_LIMIT, PCI_IO_RANGE_TYPE_32);

    pci_set_word(dev->wmask + PCI_IO_BASE_UPPER16, 0xffff);

    pci_set_word(dev->wmask + PCI_IO_LIMIT_UPPER16, 0xffff);



    pci_bridge_update_mappings(PCI_BRIDGE(br));

}



static void simba_pci_bridge_class_init(ObjectClass *klass, void *data)

{

    DeviceClass *dc = DEVICE_CLASS(klass);

    PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);



    k->realize = simba_pci_bridge_realize;

    k->exit = pci_bridge_exitfn;

    k->vendor_id = PCI_VENDOR_ID_SUN;

    k->device_id = PCI_DEVICE_ID_SUN_SIMBA;

    k->revision = 0x11;

    k->config_write = pci_bridge_write_config;

    k->is_bridge = 1;

    set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);

    dc->reset = pci_bridge_reset;

    dc->vmsd = &vmstate_pci_device;

}



static const TypeInfo simba_pci_bridge_info = {

    .name          = TYPE_SIMBA_PCI_BRIDGE,

    .parent        = TYPE_PCI_BRIDGE,

    .class_init    = simba_pci_bridge_class_init,

    .instance_size = sizeof(SimbaPCIBridge),

    .interfaces = (InterfaceInfo[]) {

        { INTERFACE_CONVENTIONAL_PCI_DEVICE },

        { },

    },

};



static void simba_register_types(void)

{

    type_register_static(&simba_pci_bridge_info);

}



type_init(simba_register_types)