Commit a3f409cb authored by Radim Krčmář's avatar Radim Krčmář Committed by Michael S. Tsirkin
Browse files

intel_iommu: support all masks in interrupt entry cache invalidation 



Linux guests do not gracefully handle cases when the invalidation mask
they wanted is not supported, probably because real hardware always
allowed all.

We can just say that all 16 masks are supported, because both
ioapic_iec_notifier and kvm_update_msi_routes_all invalidate all caches.

Signed-off-by: default avatarRadim Krčmář <rkrcmar@redhat.com>
Reviewed-by: default avatarMichael S. Tsirkin <mst@redhat.com>
Signed-off-by: default avatarMichael S. Tsirkin <mst@redhat.com>
parent 3f1fea0f

hw/i386/intel_iommu.c

+1 −1
Original line number Diff line number Diff line
@@ -2362,7 +2362,7 @@ static void vtd_init(IntelIOMMUState *s) 
    s->ecap = VTD_ECAP_QI | VTD_ECAP_IRO;



    if (x86_iommu->intr_supported) {

        s->ecap |= VTD_ECAP_IR | VTD_ECAP_EIM;

        s->ecap |= VTD_ECAP_IR | VTD_ECAP_EIM | VTD_ECAP_MHMV;

    }



    vtd_reset_context_cache(s);

hw/i386/intel_iommu_internal.h

+1 −0
Original line number Diff line number Diff line
@@ -186,6 +186,7 @@ 
/* Interrupt Remapping support */

#define VTD_ECAP_IR                 (1ULL << 3)

#define VTD_ECAP_EIM                (1ULL << 4)

#define VTD_ECAP_MHMV               (15ULL << 20)



/* CAP_REG */

/* (offset >> 4) << 24 */