Commit a26fc6f5 authored by Tony Nguyen's avatar Tony Nguyen Committed by Richard Henderson
Browse files

cputlb: Byte swap memory transaction attribute 



Notice new attribute, byte swap, and force the transaction through the
memory slow path.

Required by architectures that can invert endianness of memory
transaction, e.g. SPARC64 has the Invert Endian TTE bit.

Suggested-by: default avatarRichard Henderson <richard.henderson@linaro.org>
Signed-off-by: default avatarTony Nguyen <tony.nguyen@bt.com>
Reviewed-by: default avatarRichard Henderson <richard.henderson@linaro.org>
Message-Id: <2a10a1f1c00a894af1212c8f68ef09c2966023c1.1566466906.git.tony.nguyen@bt.com>
Signed-off-by: default avatarRichard Henderson <richard.henderson@linaro.org>
parent 9bf825bf

accel/tcg/cputlb.c

+12 −0
Original line number Diff line number Diff line
@@ -738,6 +738,10 @@ void tlb_set_page_with_attrs(CPUState *cpu, target_ulong vaddr, 
         */

        address |= TLB_RECHECK;

    }

    if (attrs.byte_swap) {

        /* Force the access through the I/O slow path.  */

        address |= TLB_MMIO;

    }

    if (!memory_region_is_ram(section->mr) &&

        !memory_region_is_romd(section->mr)) {

        /* IO memory case */
@@ -891,6 +895,10 @@ static uint64_t io_readx(CPUArchState *env, CPUIOTLBEntry *iotlbentry, 
    bool locked = false;

    MemTxResult r;



    if (iotlbentry->attrs.byte_swap) {

        op ^= MO_BSWAP;

    }



    section = iotlb_to_section(cpu, iotlbentry->addr, iotlbentry->attrs);

    mr = section->mr;

    mr_offset = (iotlbentry->addr & TARGET_PAGE_MASK) + addr;
@@ -933,6 +941,10 @@ static void io_writex(CPUArchState *env, CPUIOTLBEntry *iotlbentry, 
    bool locked = false;

    MemTxResult r;



    if (iotlbentry->attrs.byte_swap) {

        op ^= MO_BSWAP;

    }



    section = iotlb_to_section(cpu, iotlbentry->addr, iotlbentry->attrs);

    mr = section->mr;

    mr_offset = (iotlbentry->addr & TARGET_PAGE_MASK) + addr;

include/exec/memattrs.h

+2 −0
Original line number Diff line number Diff line
@@ -37,6 +37,8 @@ typedef struct MemTxAttrs { 
    unsigned int user:1;

    /* Requester ID (for MSI for example) */

    unsigned int requester_id:16;

    /* Invert endianness for this page */

    unsigned int byte_swap:1;

    /*

     * The following are target-specific page-table bits.  These are not

     * related to actual memory transactions at all.  However, this structure