Commit a26405b3 authored by Aurelien Jarno's avatar Aurelien Jarno Committed by Stefan Hajnoczi
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pcnet-pci: mark I/O and MMIO as LITTLE_ENDIAN 



Now that the memory subsystem is propagating the endianness correctly,
the pcnet-pci device should have its I/O ports and MMIO memory marked
as LITTLE_ENDIAN, as PCI devices are little endian.

This makes the pcnet-pci NIC to work again on big endian MIPS Malta
(default NIC).

Cc: qemu-stable@nongnu.org
Signed-off-by: default avatarAurelien Jarno <aurelien@aurel32.net>
Reviewed-by: default avatarStefan Hajnoczi <stefanha@redhat.com>
Signed-off-by: default avatarStefan Hajnoczi <stefanha@redhat.com>
parent 6c2679fc

hw/net/pcnet-pci.c

+2 −2
Original line number Diff line number Diff line
@@ -134,7 +134,7 @@ static void pcnet_ioport_write(void *opaque, hwaddr addr, 
static const MemoryRegionOps pcnet_io_ops = {

    .read = pcnet_ioport_read,

    .write = pcnet_ioport_write,

    .endianness = DEVICE_NATIVE_ENDIAN,

    .endianness = DEVICE_LITTLE_ENDIAN,

};



static void pcnet_mmio_writeb(void *opaque, hwaddr addr, uint32_t val)
@@ -256,7 +256,7 @@ static const MemoryRegionOps pcnet_mmio_ops = { 
        .read = { pcnet_mmio_readb, pcnet_mmio_readw, pcnet_mmio_readl },

        .write = { pcnet_mmio_writeb, pcnet_mmio_writew, pcnet_mmio_writel },

    },

    .endianness = DEVICE_NATIVE_ENDIAN,

    .endianness = DEVICE_LITTLE_ENDIAN,

};



static void pci_physical_memory_write(void *dma_opaque, hwaddr addr,