Commit a2338cfb authored by David Hildenbrand's avatar David Hildenbrand Committed by Cornelia Huck
Browse files

s390x/tcg: Implement VECTOR SIGN EXTEND TO DOUBLEWORD



Load both elements signed and store them into the two 64 bit elements.

Reviewed-by: default avatarRichard Henderson <richard.henderson@linaro.org>
Signed-off-by: default avatarDavid Hildenbrand <david@redhat.com>
Message-Id: <20190307121539.12842-27-david@redhat.com>
Signed-off-by: default avatarCornelia Huck <cohuck@redhat.com>
parent db23070c
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+2 −0
Original line number Diff line number Diff line
@@ -1032,6 +1032,8 @@
    E(0xe71a, VSCEG,   VRV,   V,   la2, 0, 0, 0, vsce, 0, ES_64, IF_VEC)
/* VECTOR SELECT */
    F(0xe78d, VSEL,    VRR_e, V,   0, 0, 0, 0, vsel, 0, IF_VEC)
/* VECTOR SIGN EXTEND TO DOUBLEWORD */
    F(0xe75f, VSEG,    VRR_a, V,   0, 0, 0, 0, vseg, 0, IF_VEC)

#ifndef CONFIG_USER_ONLY
/* COMPARE AND SWAP AND PURGE */
+33 −0
Original line number Diff line number Diff line
@@ -784,3 +784,36 @@ static DisasJumpType op_vsel(DisasContext *s, DisasOps *o)
               get_field(s->fields, v3), get_field(s->fields, v4), &gvec_op);
    return DISAS_NEXT;
}

static DisasJumpType op_vseg(DisasContext *s, DisasOps *o)
{
    const uint8_t es = get_field(s->fields, m3);
    int idx1, idx2;
    TCGv_i64 tmp;

    switch (es) {
    case ES_8:
        idx1 = 7;
        idx2 = 15;
        break;
    case ES_16:
        idx1 = 3;
        idx2 = 7;
        break;
    case ES_32:
        idx1 = 1;
        idx2 = 3;
        break;
    default:
        gen_program_exception(s, PGM_SPECIFICATION);
        return DISAS_NORETURN;
    }

    tmp = tcg_temp_new_i64();
    read_vec_element_i64(tmp, get_field(s->fields, v2), idx1, es | MO_SIGN);
    write_vec_element_i64(tmp, get_field(s->fields, v1), 0, ES_64);
    read_vec_element_i64(tmp, get_field(s->fields, v2), idx2, es | MO_SIGN);
    write_vec_element_i64(tmp, get_field(s->fields, v1), 1, ES_64);
    tcg_temp_free_i64(tmp);
    return DISAS_NEXT;
}