Unverified Commit a094b354 authored Oct 30, 2018 by Palmer Dabbelt

Add qemu-riscv@nongnu.org as the RISC-V list



We now have a RISC-V specific QEMU development list.

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>

parent a17a61f3

MAINTAINERS

+1 −0

Original line number	Diff line number	Diff line
		@@ -244,6 +244,7 @@ M: Palmer Dabbelt <palmer@sifive.com>
		M: Alistair Francis <Alistair.Francis@wdc.com>
		M: Sagar Karandikar <sagark@eecs.berkeley.edu>
		M: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
		L: qemu-riscv@nongnu.org
		S: Maintained
		F: target/riscv/
		F: hw/riscv/