Loading linux-user/main.c +23 −18 Original line number Diff line number Diff line Loading @@ -3414,17 +3414,6 @@ void cpu_loop(CPUS390XState *env) #ifdef TARGET_TILEGX static void gen_sigsegv_maperr(CPUTLGState *env, target_ulong addr) { target_siginfo_t info; info.si_signo = TARGET_SIGSEGV; info.si_errno = 0; info.si_code = TARGET_SEGV_MAPERR; info._sifields._sigfault._addr = addr; queue_signal(env, info.si_signo, &info); } static void gen_sigill_reg(CPUTLGState *env) { target_siginfo_t info; Loading @@ -3436,17 +3425,36 @@ static void gen_sigill_reg(CPUTLGState *env) queue_signal(env, info.si_signo, &info); } static void do_signal(CPUTLGState *env) static void do_signal(CPUTLGState *env, int signo, int sigcode) { target_siginfo_t info; info.si_signo = env->signo; info.si_signo = signo; info.si_errno = 0; info.si_code = env->sigcode; info._sifields._sigfault._addr = env->pc; if (signo == TARGET_SIGSEGV) { /* The passed in sigcode is a dummy; check for a page mapping and pass either MAPERR or ACCERR. */ target_ulong addr = env->excaddr; info._sifields._sigfault._addr = addr; if (page_check_range(addr, 1, PAGE_VALID) < 0) { sigcode = TARGET_SEGV_MAPERR; } else { sigcode = TARGET_SEGV_ACCERR; } } info.si_code = sigcode; queue_signal(env, info.si_signo, &info); } static void gen_sigsegv_maperr(CPUTLGState *env, target_ulong addr) { env->excaddr = addr; do_signal(env, TARGET_SIGSEGV, 0); } static void set_regval(CPUTLGState *env, uint8_t reg, uint64_t val) { if (unlikely(reg >= TILEGX_R_COUNT)) { Loading Loading @@ -3634,15 +3642,12 @@ void cpu_loop(CPUTLGState *env) do_fetch(env, trapnr, false); break; case TILEGX_EXCP_SIGNAL: do_signal(env); do_signal(env, env->signo, env->sigcode); break; case TILEGX_EXCP_REG_IDN_ACCESS: case TILEGX_EXCP_REG_UDN_ACCESS: gen_sigill_reg(env); break; case TILEGX_EXCP_SEGV: gen_sigsegv_maperr(env, env->excaddr); break; default: fprintf(stderr, "trapnr is %d[0x%x].\n", trapnr, trapnr); g_assert_not_reached(); Loading target-tilegx/cpu.c +6 −1 Original line number Diff line number Diff line Loading @@ -22,6 +22,7 @@ #include "qemu-common.h" #include "hw/qdev-properties.h" #include "migration/vmstate.h" #include "linux-user/syscall_defs.h" static void tilegx_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, int flags) Loading Loading @@ -121,8 +122,12 @@ static int tilegx_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int rw, { TileGXCPU *cpu = TILEGX_CPU(cs); cs->exception_index = TILEGX_EXCP_SEGV; /* The sigcode field will be filled in by do_signal in main.c. */ cs->exception_index = TILEGX_EXCP_SIGNAL; cpu->env.excaddr = address; cpu->env.signo = TARGET_SIGSEGV; cpu->env.sigcode = 0; return 1; } Loading target-tilegx/cpu.h +1 −2 Original line number Diff line number Diff line Loading @@ -60,8 +60,7 @@ enum { typedef enum { TILEGX_EXCP_NONE = 0, TILEGX_EXCP_SYSCALL = 1, TILEGX_EXCP_SEGV = 2, TILEGX_EXCP_SIGNAL = 3, TILEGX_EXCP_SIGNAL = 2, TILEGX_EXCP_OPCODE_UNKNOWN = 0x101, TILEGX_EXCP_OPCODE_UNIMPLEMENTED = 0x102, TILEGX_EXCP_OPCODE_CMPEXCH = 0x103, Loading Loading
linux-user/main.c +23 −18 Original line number Diff line number Diff line Loading @@ -3414,17 +3414,6 @@ void cpu_loop(CPUS390XState *env) #ifdef TARGET_TILEGX static void gen_sigsegv_maperr(CPUTLGState *env, target_ulong addr) { target_siginfo_t info; info.si_signo = TARGET_SIGSEGV; info.si_errno = 0; info.si_code = TARGET_SEGV_MAPERR; info._sifields._sigfault._addr = addr; queue_signal(env, info.si_signo, &info); } static void gen_sigill_reg(CPUTLGState *env) { target_siginfo_t info; Loading @@ -3436,17 +3425,36 @@ static void gen_sigill_reg(CPUTLGState *env) queue_signal(env, info.si_signo, &info); } static void do_signal(CPUTLGState *env) static void do_signal(CPUTLGState *env, int signo, int sigcode) { target_siginfo_t info; info.si_signo = env->signo; info.si_signo = signo; info.si_errno = 0; info.si_code = env->sigcode; info._sifields._sigfault._addr = env->pc; if (signo == TARGET_SIGSEGV) { /* The passed in sigcode is a dummy; check for a page mapping and pass either MAPERR or ACCERR. */ target_ulong addr = env->excaddr; info._sifields._sigfault._addr = addr; if (page_check_range(addr, 1, PAGE_VALID) < 0) { sigcode = TARGET_SEGV_MAPERR; } else { sigcode = TARGET_SEGV_ACCERR; } } info.si_code = sigcode; queue_signal(env, info.si_signo, &info); } static void gen_sigsegv_maperr(CPUTLGState *env, target_ulong addr) { env->excaddr = addr; do_signal(env, TARGET_SIGSEGV, 0); } static void set_regval(CPUTLGState *env, uint8_t reg, uint64_t val) { if (unlikely(reg >= TILEGX_R_COUNT)) { Loading Loading @@ -3634,15 +3642,12 @@ void cpu_loop(CPUTLGState *env) do_fetch(env, trapnr, false); break; case TILEGX_EXCP_SIGNAL: do_signal(env); do_signal(env, env->signo, env->sigcode); break; case TILEGX_EXCP_REG_IDN_ACCESS: case TILEGX_EXCP_REG_UDN_ACCESS: gen_sigill_reg(env); break; case TILEGX_EXCP_SEGV: gen_sigsegv_maperr(env, env->excaddr); break; default: fprintf(stderr, "trapnr is %d[0x%x].\n", trapnr, trapnr); g_assert_not_reached(); Loading
target-tilegx/cpu.c +6 −1 Original line number Diff line number Diff line Loading @@ -22,6 +22,7 @@ #include "qemu-common.h" #include "hw/qdev-properties.h" #include "migration/vmstate.h" #include "linux-user/syscall_defs.h" static void tilegx_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, int flags) Loading Loading @@ -121,8 +122,12 @@ static int tilegx_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int rw, { TileGXCPU *cpu = TILEGX_CPU(cs); cs->exception_index = TILEGX_EXCP_SEGV; /* The sigcode field will be filled in by do_signal in main.c. */ cs->exception_index = TILEGX_EXCP_SIGNAL; cpu->env.excaddr = address; cpu->env.signo = TARGET_SIGSEGV; cpu->env.sigcode = 0; return 1; } Loading
target-tilegx/cpu.h +1 −2 Original line number Diff line number Diff line Loading @@ -60,8 +60,7 @@ enum { typedef enum { TILEGX_EXCP_NONE = 0, TILEGX_EXCP_SYSCALL = 1, TILEGX_EXCP_SEGV = 2, TILEGX_EXCP_SIGNAL = 3, TILEGX_EXCP_SIGNAL = 2, TILEGX_EXCP_OPCODE_UNKNOWN = 0x101, TILEGX_EXCP_OPCODE_UNIMPLEMENTED = 0x102, TILEGX_EXCP_OPCODE_CMPEXCH = 0x103, Loading