Commit 9db0855e authored by Peter Maydell's avatar Peter Maydell
Browse files

Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20180301' into staging 



target-arm queue:
 * update MAINTAINERS for Alistair's new email address
 * add Arm v8.2 FP16 arithmetic extension for linux-user
 * implement display connector emulation for vexpress board
 * xilinx_spips: Enable only two slaves when reading/writing with stripe
 * xilinx_spips: Use 8 dummy cycles with the QIOR/QIOR4 commands
 * hw: register: Run post_write hook on reset

# gpg: Signature made Thu 01 Mar 2018 11:22:46 GMT
# gpg:                using RSA key 3C2525ED14360CDE
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>"
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>"
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-target-arm-20180301: (42 commits)
  MAINTAINERS: Update my email address
  linux-user: Report AArch64 FP16 support via hwcap bits
  target/arm: Enable ARM_V8_FP16 feature bit for the AArch64 "any" CPU
  arm/translate-a64: add all single op FP16 to handle_fp_1src_half
  arm/translate-a64: implement simd_scalar_three_reg_same_fp16
  arm/translate-a64: add all FP16 ops in simd_scalar_pairwise
  arm/translate-a64: add FP16 FMOV to simd_mod_imm
  arm/translate-a64: add FP16 FRSQRTE to simd_two_reg_misc_fp16
  arm/helper.c: re-factor rsqrte and add rsqrte_f16
  arm/translate-a64: add FP16 FSQRT to simd_two_reg_misc_fp16
  arm/translate-a64: add FP16 FRCPX to simd_two_reg_misc_fp16
  arm/translate-a64: add FP16 FRECPE
  arm/helper.c: re-factor recpe and add recepe_f16
  arm/translate-a64: add FP16 FNEG/FABS to simd_two_reg_misc_fp16
  arm/translate-a64: add FP16 SCVTF/UCVFT to simd_two_reg_misc_fp16
  arm/translate-a64: add FP16 FCMxx (zero) to simd_two_reg_misc_fp16
  arm/translate-a64: add FCVTxx to simd_two_reg_misc_fp16
  arm/translate-a64: add FP16 FPRINTx to simd_two_reg_misc_fp16
  arm/translate-a64: initial decode for simd_two_reg_misc_fp16
  arm/translate-a64: add FP16 x2 ops for simd_indexed
  ...

Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parents 8cb340c6 c22e580c

MAINTAINERS

+6 −6
Original line number Diff line number Diff line
@@ -556,7 +556,7 @@ F: hw/misc/arm_sysctl.c 


Xilinx Zynq

M: Edgar E. Iglesias <edgar.iglesias@gmail.com>

M: Alistair Francis <alistair.francis@xilinx.com>

M: Alistair Francis <alistair@alistair23.me>

L: qemu-arm@nongnu.org

S: Maintained

F: hw/*/xilinx_*
@@ -566,7 +566,7 @@ F: include/hw/misc/zynq* 
X: hw/ssi/xilinx_*



Xilinx ZynqMP

M: Alistair Francis <alistair.francis@xilinx.com>

M: Alistair Francis <alistair@alistair23.me>

M: Edgar E. Iglesias <edgar.iglesias@gmail.com>

L: qemu-arm@nongnu.org

S: Maintained
@@ -1075,7 +1075,7 @@ T: git git://github.com/bonzini/qemu.git scsi-next 


SSI

M: Peter Crosthwaite <crosthwaite.peter@gmail.com>

M: Alistair Francis <alistair.francis@xilinx.com>

M: Alistair Francis <alistair@alistair23.me>

S: Maintained

F: hw/ssi/*

F: hw/block/m25p80.c
@@ -1084,7 +1084,7 @@ X: hw/ssi/xilinx_* 
F: tests/m25p80-test.c



Xilinx SPI

M: Alistair Francis <alistair.francis@xilinx.com>

M: Alistair Francis <alistair@alistair23.me>

M: Peter Crosthwaite <crosthwaite.peter@gmail.com>

S: Maintained

F: hw/ssi/xilinx_*
@@ -1254,7 +1254,7 @@ S: Maintained 
F: hw/net/eepro100.c



Generic Loader

M: Alistair Francis <alistair.francis@xilinx.com>

M: Alistair Francis <alistair@alistair23.me>

S: Maintained

F: hw/core/generic-loader.c

F: include/hw/core/generic-loader.h
@@ -1600,7 +1600,7 @@ F: tests/qmp-test.c 
T: git git://repo.or.cz/qemu/armbru.git qapi-next



Register API

M: Alistair Francis <alistair.francis@xilinx.com>

M: Alistair Francis <alistair@alistair23.me>

S: Maintained

F: hw/core/register.c

F: include/hw/register.h

default-configs/arm-softmmu.mak

+2 −0
Original line number Diff line number Diff line
@@ -21,6 +21,8 @@ CONFIG_STELLARIS_INPUT=y 
CONFIG_STELLARIS_ENET=y

CONFIG_SSD0303=y

CONFIG_SSD0323=y

CONFIG_DDC=y

CONFIG_SII9022=y

CONFIG_ADS7846=y

CONFIG_MAX111X=y

CONFIG_SSI=y

hw/arm/vexpress.c

+5 −1
Original line number Diff line number Diff line
@@ -29,6 +29,7 @@ 
#include "hw/arm/arm.h"

#include "hw/arm/primecell.h"

#include "hw/devices.h"

#include "hw/i2c/i2c.h"

#include "net/net.h"

#include "sysemu/sysemu.h"

#include "hw/boards.h"
@@ -537,6 +538,7 @@ static void vexpress_common_init(MachineState *machine) 
    uint32_t sys_id;

    DriveInfo *dinfo;

    pflash_t *pflash0;

    I2CBus *i2c;

    ram_addr_t vram_size, sram_size;

    MemoryRegion *sysmem = get_system_memory();

    MemoryRegion *vram = g_new(MemoryRegion, 1);
@@ -628,7 +630,9 @@ static void vexpress_common_init(MachineState *machine) 
    sysbus_create_simple("sp804", map[VE_TIMER01], pic[2]);

    sysbus_create_simple("sp804", map[VE_TIMER23], pic[3]);



    /* VE_SERIALDVI: not modelled */

    dev = sysbus_create_simple("versatile_i2c", map[VE_SERIALDVI], NULL);

    i2c = (I2CBus *)qdev_get_child_bus(dev, "i2c");

    i2c_create_slave(i2c, "sii9022", 0x39);



    sysbus_create_simple("pl031", map[VE_RTC], pic[4]); /* RTC */

hw/core/register.c

+8 −0
Original line number Diff line number Diff line
@@ -159,13 +159,21 @@ uint64_t register_read(RegisterInfo *reg, uint64_t re, const char* prefix, 


void register_reset(RegisterInfo *reg)

{

    const RegisterAccessInfo *ac;



    g_assert(reg);



    if (!reg->data || !reg->access) {

        return;

    }



    ac = reg->access;



    register_write_val(reg, reg->access->reset);



    if (ac->post_write) {

        ac->post_write(reg, reg->access->reset);

    }

}



void register_init(RegisterInfo *reg)

hw/display/Makefile.objs

+1 −0
Original line number Diff line number Diff line
@@ -3,6 +3,7 @@ common-obj-$(CONFIG_VGA_CIRRUS) += cirrus_vga.o 
common-obj-$(CONFIG_G364FB) += g364fb.o

common-obj-$(CONFIG_JAZZ_LED) += jazz_led.o

common-obj-$(CONFIG_PL110) += pl110.o

common-obj-$(CONFIG_SII9022) += sii9022.o

common-obj-$(CONFIG_SSD0303) += ssd0303.o

common-obj-$(CONFIG_SSD0323) += ssd0323.o

common-obj-$(CONFIG_XEN) += xenfb.o