Loading target-i386/cpu.h +0 −2 Original line number Diff line number Diff line Loading @@ -31,8 +31,6 @@ /* Maximum instruction code size */ #define TARGET_MAX_INSN_SIZE 16 /* target supports implicit self modifying code */ #define TARGET_HAS_SMC /* support for self modifying code even if the modified instruction is close to the modifying instruction */ #define TARGET_HAS_PRECISE_SMC Loading translate-all.c +0 −4 Original line number Diff line number Diff line Loading @@ -1334,8 +1334,6 @@ static inline void tb_alloc_page(TranslationBlock *tb, p->first_tb = (TranslationBlock *)((uintptr_t)tb | n); invalidate_page_bitmap(p); #if defined(TARGET_HAS_SMC) || 1 #if defined(CONFIG_USER_ONLY) if (p->flags & PAGE_WRITE) { target_ulong addr; Loading Loading @@ -1371,8 +1369,6 @@ static inline void tb_alloc_page(TranslationBlock *tb, tlb_protect_code(page_addr); } #endif #endif /* TARGET_HAS_SMC */ } /* add a new TB and link it to the physical page tables. phys_page2 is Loading Loading
target-i386/cpu.h +0 −2 Original line number Diff line number Diff line Loading @@ -31,8 +31,6 @@ /* Maximum instruction code size */ #define TARGET_MAX_INSN_SIZE 16 /* target supports implicit self modifying code */ #define TARGET_HAS_SMC /* support for self modifying code even if the modified instruction is close to the modifying instruction */ #define TARGET_HAS_PRECISE_SMC Loading
translate-all.c +0 −4 Original line number Diff line number Diff line Loading @@ -1334,8 +1334,6 @@ static inline void tb_alloc_page(TranslationBlock *tb, p->first_tb = (TranslationBlock *)((uintptr_t)tb | n); invalidate_page_bitmap(p); #if defined(TARGET_HAS_SMC) || 1 #if defined(CONFIG_USER_ONLY) if (p->flags & PAGE_WRITE) { target_ulong addr; Loading Loading @@ -1371,8 +1369,6 @@ static inline void tb_alloc_page(TranslationBlock *tb, tlb_protect_code(page_addr); } #endif #endif /* TARGET_HAS_SMC */ } /* add a new TB and link it to the physical page tables. phys_page2 is Loading