Commit 9bee50b4 authored by Peter Maydell's avatar Peter Maydell
Browse files

target/arm: Use vfp_expand_imm() for AArch32 VFP VMOV_imm



The AArch32 VMOV (immediate) instruction uses the same VFP encoded
immediate format we already handle in vfp_expand_imm().  Use that
function rather than hand-decoding it.

Suggested-by: default avatarRichard Henderson <richard.henderson@linaro.org>
Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
Reviewed-by: default avatarRichard Henderson <richard.henderson@linaro.org>
Tested-by: default avatarPhilippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 20190613163917.28589-3-peter.maydell@linaro.org
parent d6a092d4
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+4 −24
Original line number Diff line number Diff line
@@ -1842,7 +1842,7 @@ static bool trans_VMOV_imm_sp(DisasContext *s, arg_VMOV_imm_sp *a)
    uint32_t delta_d = 0;
    int veclen = s->vec_len;
    TCGv_i32 fd;
    uint32_t n, i, vd;
    uint32_t vd;

    vd = a->vd;

@@ -1869,17 +1869,7 @@ static bool trans_VMOV_imm_sp(DisasContext *s, arg_VMOV_imm_sp *a)
        }
    }

    n = (a->imm4h << 28) & 0x80000000;
    i = ((a->imm4h << 4) & 0x70) | a->imm4l;
    if (i & 0x40) {
        i |= 0x780;
    } else {
        i |= 0x800;
    }
    n |= i << 19;

    fd = tcg_temp_new_i32();
    tcg_gen_movi_i32(fd, n);
    fd = tcg_const_i32(vfp_expand_imm(MO_32, a->imm));

    for (;;) {
        neon_store_reg32(fd, vd);
@@ -1902,7 +1892,7 @@ static bool trans_VMOV_imm_dp(DisasContext *s, arg_VMOV_imm_dp *a)
    uint32_t delta_d = 0;
    int veclen = s->vec_len;
    TCGv_i64 fd;
    uint32_t n, i, vd;
    uint32_t vd;

    vd = a->vd;

@@ -1934,17 +1924,7 @@ static bool trans_VMOV_imm_dp(DisasContext *s, arg_VMOV_imm_dp *a)
        }
    }

    n = (a->imm4h << 28) & 0x80000000;
    i = ((a->imm4h << 4) & 0x70) | a->imm4l;
    if (i & 0x40) {
        i |= 0x3f80;
    } else {
        i |= 0x4000;
    }
    n |= i << 16;

    fd = tcg_temp_new_i64();
    tcg_gen_movi_i64(fd, ((uint64_t)n) << 32);
    fd = tcg_const_i64(vfp_expand_imm(MO_64, a->imm));

    for (;;) {
        neon_store_reg64(fd, vd);
+6 −4
Original line number Diff line number Diff line
@@ -44,6 +44,8 @@
%vmov_idx_b     21:1 5:2
%vmov_idx_h     21:1 6:1

%vmov_imm 16:4 0:4

# VMOV scalar to general-purpose register; note that this does
# include some Neon cases.
VMOV_to_gp   ---- 1110 u:1 1.        1 .... rt:4 1011 ... 1 0000 \
@@ -152,10 +154,10 @@ VFM_sp ---- 1110 1.10 .... .... 1010 . o2:1 . 0 .... \
VFM_dp       ---- 1110 1.10 .... .... 1011 . o2:1 . 0 .... \
             vm=%vm_dp vn=%vn_dp vd=%vd_dp o1=2

VMOV_imm_sp  ---- 1110 1.11 imm4h:4 .... 1010 0000 imm4l:4 \
             vd=%vd_sp
VMOV_imm_dp  ---- 1110 1.11 imm4h:4 .... 1011 0000 imm4l:4 \
             vd=%vd_dp
VMOV_imm_sp  ---- 1110 1.11 .... .... 1010 0000 .... \
             vd=%vd_sp imm=%vmov_imm
VMOV_imm_dp  ---- 1110 1.11 .... .... 1011 0000 .... \
             vd=%vd_dp imm=%vmov_imm

VMOV_reg_sp  ---- 1110 1.11 0000 .... 1010 01.0 .... \
             vd=%vd_sp vm=%vm_sp