Loading linux-user/main.c +3 −0 Original line number Diff line number Diff line Loading @@ -3460,6 +3460,9 @@ void cpu_loop(CPUTLGState *env) case TILEGX_EXCP_REG_UDN_ACCESS: gen_sigill_reg(env); break; case TILEGX_EXCP_SEGV: gen_sigsegv_maperr(env, env->excaddr); break; default: fprintf(stderr, "trapnr is %d[0x%x].\n", trapnr, trapnr); g_assert_not_reached(); Loading target-tilegx/cpu.c +4 −1 Original line number Diff line number Diff line Loading @@ -119,7 +119,10 @@ static void tilegx_cpu_do_interrupt(CPUState *cs) static int tilegx_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int rw, int mmu_idx) { cpu_dump_state(cs, stderr, fprintf, 0); TileGXCPU *cpu = TILEGX_CPU(cs); cs->exception_index = TILEGX_EXCP_SEGV; cpu->env.excaddr = address; return 1; } Loading target-tilegx/cpu.h +2 −0 Original line number Diff line number Diff line Loading @@ -60,6 +60,7 @@ enum { typedef enum { TILEGX_EXCP_NONE = 0, TILEGX_EXCP_SYSCALL = 1, TILEGX_EXCP_SEGV = 2, TILEGX_EXCP_OPCODE_UNKNOWN = 0x101, TILEGX_EXCP_OPCODE_UNIMPLEMENTED = 0x102, TILEGX_EXCP_OPCODE_CMPEXCH = 0x103, Loading Loading @@ -87,6 +88,7 @@ typedef struct CPUTLGState { #if defined(CONFIG_USER_ONLY) uint32_t excparam; /* exception parameter */ uint64_t excaddr; /* exception address */ #endif CPU_COMMON Loading Loading
linux-user/main.c +3 −0 Original line number Diff line number Diff line Loading @@ -3460,6 +3460,9 @@ void cpu_loop(CPUTLGState *env) case TILEGX_EXCP_REG_UDN_ACCESS: gen_sigill_reg(env); break; case TILEGX_EXCP_SEGV: gen_sigsegv_maperr(env, env->excaddr); break; default: fprintf(stderr, "trapnr is %d[0x%x].\n", trapnr, trapnr); g_assert_not_reached(); Loading
target-tilegx/cpu.c +4 −1 Original line number Diff line number Diff line Loading @@ -119,7 +119,10 @@ static void tilegx_cpu_do_interrupt(CPUState *cs) static int tilegx_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int rw, int mmu_idx) { cpu_dump_state(cs, stderr, fprintf, 0); TileGXCPU *cpu = TILEGX_CPU(cs); cs->exception_index = TILEGX_EXCP_SEGV; cpu->env.excaddr = address; return 1; } Loading
target-tilegx/cpu.h +2 −0 Original line number Diff line number Diff line Loading @@ -60,6 +60,7 @@ enum { typedef enum { TILEGX_EXCP_NONE = 0, TILEGX_EXCP_SYSCALL = 1, TILEGX_EXCP_SEGV = 2, TILEGX_EXCP_OPCODE_UNKNOWN = 0x101, TILEGX_EXCP_OPCODE_UNIMPLEMENTED = 0x102, TILEGX_EXCP_OPCODE_CMPEXCH = 0x103, Loading Loading @@ -87,6 +88,7 @@ typedef struct CPUTLGState { #if defined(CONFIG_USER_ONLY) uint32_t excparam; /* exception parameter */ uint64_t excaddr; /* exception address */ #endif CPU_COMMON Loading