Commit 9b5b74da authored by Richard Henderson's avatar Richard Henderson Committed by David Gibson
Browse files

target/ppc: Split out VSCR_SAT to a vector field 



Change the representation of VSCR_SAT such that it is easy
to set from vector code.

Signed-off-by: default avatarRichard Henderson <richard.henderson@linaro.org>
Acked-by: default avatarDavid Gibson <david@gibson.dropbear.id.au>
Message-Id: <20190215100058.20015-16-mark.cave-ayland@ilande.co.uk>
Signed-off-by: default avatarDavid Gibson <david@gibson.dropbear.id.au>
parent 6175f5a0

target/ppc/cpu.h

+3 −1
Original line number Diff line number Diff line
@@ -1052,10 +1052,12 @@ struct CPUPPCState { 
    /* Special purpose registers */

    target_ulong spr[1024];

    ppc_spr_t spr_cb[1024];

    /* Vector status and control register */

    /* Vector status and control register, minus VSCR_SAT.  */

    uint32_t vscr;

    /* VSX registers (including FP and AVR) */

    ppc_vsr_t vsr[64] QEMU_ALIGNED(16);

    /* Non-zero if and only if VSCR_SAT should be set.  */

    ppc_vsr_t vscr_sat QEMU_ALIGNED(16);

    /* SPE registers */

    uint64_t spe_acc;

    uint32_t spe_fscr;

target/ppc/int_helper.c

+8 −3
Original line number Diff line number Diff line
@@ -459,18 +459,23 @@ void helper_lvsr(ppc_avr_t *r, target_ulong sh) 


void helper_mtvscr(CPUPPCState *env, uint32_t vscr)

{

    env->vscr = vscr;

    env->vscr = vscr & ~(1u << VSCR_SAT);

    /* Which bit we set is completely arbitrary, but clear the rest.  */

    env->vscr_sat.u64[0] = vscr & (1u << VSCR_SAT);

    env->vscr_sat.u64[1] = 0;

    set_flush_to_zero((vscr >> VSCR_NJ) & 1, &env->vec_status);

}



uint32_t helper_mfvscr(CPUPPCState *env)

{

    return env->vscr;

    uint32_t sat = (env->vscr_sat.u64[0] | env->vscr_sat.u64[1]) != 0;

    return env->vscr | (sat << VSCR_SAT);

}



static inline void set_vscr_sat(CPUPPCState *env)

{

    env->vscr |= 1 << VSCR_SAT;

    /* The choice of non-zero value is arbitrary.  */

    env->vscr_sat.u32[0] = 1;

}



void helper_vaddcuw(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)