Commit 9a9eda78 authored by Richard Henderson's avatar Richard Henderson
Browse files

tcg: Add logical simplifications during gvec expand 



We handle many of these during integer expansion, and the
rest of them during integer optimization.

Reviewed-by: default avatarDavid Gibson <david@gibson.dropbear.id.au>
Signed-off-by: default avatarRichard Henderson <richard.henderson@linaro.org>
parent ad7a21e8

tcg/tcg-op-gvec.c

+30 −5
Original line number Diff line number Diff line
@@ -1840,8 +1840,13 @@ void tcg_gen_gvec_and(unsigned vece, uint32_t dofs, uint32_t aofs, 
        .opc = INDEX_op_and_vec,

        .prefer_i64 = TCG_TARGET_REG_BITS == 64,

    };



    if (aofs == bofs) {

        tcg_gen_gvec_mov(vece, dofs, aofs, oprsz, maxsz);

    } else {

        tcg_gen_gvec_3(dofs, aofs, bofs, oprsz, maxsz, &g);

    }

}



void tcg_gen_gvec_or(unsigned vece, uint32_t dofs, uint32_t aofs,

                     uint32_t bofs, uint32_t oprsz, uint32_t maxsz)
@@ -1853,8 +1858,13 @@ void tcg_gen_gvec_or(unsigned vece, uint32_t dofs, uint32_t aofs, 
        .opc = INDEX_op_or_vec,

        .prefer_i64 = TCG_TARGET_REG_BITS == 64,

    };



    if (aofs == bofs) {

        tcg_gen_gvec_mov(vece, dofs, aofs, oprsz, maxsz);

    } else {

        tcg_gen_gvec_3(dofs, aofs, bofs, oprsz, maxsz, &g);

    }

}



void tcg_gen_gvec_xor(unsigned vece, uint32_t dofs, uint32_t aofs,

                      uint32_t bofs, uint32_t oprsz, uint32_t maxsz)
@@ -1866,8 +1876,13 @@ void tcg_gen_gvec_xor(unsigned vece, uint32_t dofs, uint32_t aofs, 
        .opc = INDEX_op_xor_vec,

        .prefer_i64 = TCG_TARGET_REG_BITS == 64,

    };



    if (aofs == bofs) {

        tcg_gen_gvec_dup8i(dofs, oprsz, maxsz, 0);

    } else {

        tcg_gen_gvec_3(dofs, aofs, bofs, oprsz, maxsz, &g);

    }

}



void tcg_gen_gvec_andc(unsigned vece, uint32_t dofs, uint32_t aofs,

                       uint32_t bofs, uint32_t oprsz, uint32_t maxsz)
@@ -1879,8 +1894,13 @@ void tcg_gen_gvec_andc(unsigned vece, uint32_t dofs, uint32_t aofs, 
        .opc = INDEX_op_andc_vec,

        .prefer_i64 = TCG_TARGET_REG_BITS == 64,

    };



    if (aofs == bofs) {

        tcg_gen_gvec_dup8i(dofs, oprsz, maxsz, 0);

    } else {

        tcg_gen_gvec_3(dofs, aofs, bofs, oprsz, maxsz, &g);

    }

}



void tcg_gen_gvec_orc(unsigned vece, uint32_t dofs, uint32_t aofs,

                      uint32_t bofs, uint32_t oprsz, uint32_t maxsz)
@@ -1892,8 +1912,13 @@ void tcg_gen_gvec_orc(unsigned vece, uint32_t dofs, uint32_t aofs, 
        .opc = INDEX_op_orc_vec,

        .prefer_i64 = TCG_TARGET_REG_BITS == 64,

    };



    if (aofs == bofs) {

        tcg_gen_gvec_dup8i(dofs, oprsz, maxsz, -1);

    } else {

        tcg_gen_gvec_3(dofs, aofs, bofs, oprsz, maxsz, &g);

    }

}



static const GVecGen2s gop_ands = {

    .fni8 = tcg_gen_and_i64,