Commit 9a13565d authored by Peter Crosthwaite's avatar Peter Crosthwaite Committed by Paolo Bonzini
Browse files

cputlb: move CPU_LOOP() for tlb_reset() to exec.c 



To prepare for multi-arch, cputlb.c should only have awareness of one
single architecture. This means it should not have access to the full
CPU lists which may be heterogeneous. Instead, push the CPU_LOOP() up
to the one and only caller in exec.c.

Signed-off-by: default avatarPeter Crosthwaite <crosthwaite.peter@gmail.com>
Message-Id: <db06dc6c49f8970caaf116d0385f00ee10a56f2f.1441614289.git.crosthwaite.peter@gmail.com>
Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
parent 5f12a788

cputlb.c

+12 −15
Original line number Diff line number Diff line
@@ -262,12 +262,10 @@ static inline ram_addr_t qemu_ram_addr_from_host_nofail(void *ptr) 
    return ram_addr;

}



void cpu_tlb_reset_dirty_all(ram_addr_t start1, ram_addr_t length)

void tlb_reset_dirty(CPUState *cpu, ram_addr_t start1, ram_addr_t length)

{

    CPUState *cpu;

    CPUArchState *env;



    CPU_FOREACH(cpu) {

    int mmu_idx;



    env = cpu->env_ptr;
@@ -285,7 +283,6 @@ void cpu_tlb_reset_dirty_all(ram_addr_t start1, ram_addr_t length) 
        }

    }

}

}



static inline void tlb_set_dirty1(CPUTLBEntry *tlb_entry, target_ulong vaddr)

{

exec.c

+4 −1
Original line number Diff line number Diff line
@@ -913,6 +913,7 @@ found: 


static void tlb_reset_dirty_range_all(ram_addr_t start, ram_addr_t length)

{

    CPUState *cpu;

    ram_addr_t start1;

    RAMBlock *block;

    ram_addr_t end;
@@ -924,7 +925,9 @@ static void tlb_reset_dirty_range_all(ram_addr_t start, ram_addr_t length) 
    block = qemu_get_ram_block(start);

    assert(block == qemu_get_ram_block(end - 1));

    start1 = (uintptr_t)ramblock_ptr(block, start - block->offset);

    cpu_tlb_reset_dirty_all(start1, length);

    CPU_FOREACH(cpu) {

        tlb_reset_dirty(cpu, start1, length);

    }

    rcu_read_unlock();

}

include/exec/cputlb.h

+1 −1
Original line number Diff line number Diff line
@@ -25,7 +25,7 @@ void tlb_protect_code(ram_addr_t ram_addr); 
void tlb_unprotect_code(ram_addr_t ram_addr);

void tlb_reset_dirty_range(CPUTLBEntry *tlb_entry, uintptr_t start,

                           uintptr_t length);

void cpu_tlb_reset_dirty_all(ram_addr_t start1, ram_addr_t length);

void tlb_reset_dirty(CPUState *cpu, ram_addr_t start1, ram_addr_t length);

void tlb_set_dirty(CPUArchState *env, target_ulong vaddr);

extern int tlb_flush_count;