Commit 99d863d6 authored by Richard Henderson's avatar Richard Henderson
Browse files

target/openrisc: Convert dec_mac 



Acked-by: default avatarStafford Horne <shorne@gmail.com>
Signed-off-by: default avatarRichard Henderson <richard.henderson@linaro.org>
parent 6ad216ab

target/openrisc/insns.decode

+5 −0
Original line number Diff line number Diff line
@@ -125,3 +125,8 @@ l_divu 111000 d:5 a:5 b:5 - 11 ---- 1010 


l_muld          111000 ----- a:5 b:5 - 11 ---- 0111

l_muldu         111000 ----- a:5 b:5 - 11 ---- 1100



l_mac           110001 ----- a:5 b:5 ------- 0001

l_macu          110001 ----- a:5 b:5 ------- 0011

l_msb           110001 ----- a:5 b:5 ------- 0010

l_msbu          110001 ----- a:5 b:5 ------- 0100

target/openrisc/translate.c

+22 −33
Original line number Diff line number Diff line
@@ -970,39 +970,32 @@ static bool trans_l_mtspr(DisasContext *dc, arg_l_mtspr *a, uint32_t insn) 
    return true;

}



static void dec_mac(DisasContext *dc, uint32_t insn)

static bool trans_l_mac(DisasContext *dc, arg_ab *a, uint32_t insn)

{

    uint32_t op0;

    uint32_t ra, rb;

    op0 = extract32(insn, 0, 4);

    ra = extract32(insn, 16, 5);

    rb = extract32(insn, 11, 5);



    switch (op0) {

    case 0x0001:    /* l.mac */

        LOG_DIS("l.mac r%d, r%d\n", ra, rb);

        gen_mac(dc, cpu_R[ra], cpu_R[rb]);

        break;



    case 0x0002:    /* l.msb */

        LOG_DIS("l.msb r%d, r%d\n", ra, rb);

        gen_msb(dc, cpu_R[ra], cpu_R[rb]);

        break;



    case 0x0003:    /* l.macu */

        LOG_DIS("l.macu r%d, r%d\n", ra, rb);

        gen_macu(dc, cpu_R[ra], cpu_R[rb]);

        break;

    LOG_DIS("l.mac r%d, r%d\n", a->a, a->b);

    gen_mac(dc, cpu_R[a->a], cpu_R[a->b]);

    return true;

}



    case 0x0004:    /* l.msbu */

        LOG_DIS("l.msbu r%d, r%d\n", ra, rb);

        gen_msbu(dc, cpu_R[ra], cpu_R[rb]);

        break;

static bool trans_l_msb(DisasContext *dc, arg_ab *a, uint32_t insn)

{

    LOG_DIS("l.msb r%d, r%d\n", a->a, a->b);

    gen_msb(dc, cpu_R[a->a], cpu_R[a->b]);

    return true;

}



    default:

        gen_illegal_exception(dc);

        break;

static bool trans_l_macu(DisasContext *dc, arg_ab *a, uint32_t insn)

{

    LOG_DIS("l.mac r%d, r%d\n", a->a, a->b);

    gen_macu(dc, cpu_R[a->a], cpu_R[a->b]);

    return true;

}



static bool trans_l_msbu(DisasContext *dc, arg_ab *a, uint32_t insn)

{

    LOG_DIS("l.msb r%d, r%d\n", a->a, a->b);

    gen_msbu(dc, cpu_R[a->a], cpu_R[a->b]);

    return true;

}



static void dec_logic(DisasContext *dc, uint32_t insn)
@@ -1505,10 +1498,6 @@ static void disas_openrisc_insn(DisasContext *dc, OpenRISCCPU *cpu) 
        dec_compi(dc, insn);

        break;



    case 0x31:

        dec_mac(dc, insn);

        break;



    case 0x32:

        dec_float(dc, insn);

        break;