Commit 978364f1 authored by Alistair Francis's avatar Alistair Francis Committed by Peter Maydell
Browse files

target-arm: Add the pmovsclr_el0 and pmintenclr_el1 registers 



Signed-off-by: default avatarAaron Lindsay <alindsay@codeaurora.org>
Signed-off-by: default avatarAlistair Francis <alistair.francis@xilinx.com>
Tested-by: default avatarNathan Rossi <nathan@nathanrossi.com>
Reviewed-by: default avatarPeter Maydell <peter.maydell@linaro.org>
Message-id: 50deeafb24958a5b6d7f594b5dda399a022c0e5b.1455060548.git.alistair.francis@xilinx.com
Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parent 4054bfa9

target-arm/helper.c

+12 −0
Original line number Diff line number Diff line
@@ -1057,6 +1057,13 @@ static const ARMCPRegInfo v7_cp_reginfo[] = { 
      .accessfn = pmreg_access,

      .writefn = pmovsr_write,

      .raw_writefn = raw_write },

    { .name = "PMOVSCLR_EL0", .state = ARM_CP_STATE_AA64,

      .opc0 = 3, .opc1 = 3, .crn = 9, .crm = 12, .opc2 = 3,

      .access = PL0_RW, .accessfn = pmreg_access,

      .type = ARM_CP_ALIAS,

      .fieldoffset = offsetof(CPUARMState, cp15.c9_pmovsr),

      .writefn = pmovsr_write,

      .raw_writefn = raw_write },

    /* Unimplemented so WI. */

    { .name = "PMSWINC", .cp = 15, .crn = 9, .crm = 12, .opc1 = 0, .opc2 = 4,

      .access = PL0_W, .accessfn = pmreg_access, .type = ARM_CP_NOP },
@@ -1107,6 +1114,11 @@ static const ARMCPRegInfo v7_cp_reginfo[] = { 
      .access = PL1_RW, .type = ARM_CP_ALIAS,

      .fieldoffset = offsetof(CPUARMState, cp15.c9_pminten),

      .writefn = pmintenclr_write, },

    { .name = "PMINTENCLR_EL1", .state = ARM_CP_STATE_AA64,

      .opc0 = 3, .opc1 = 0, .crn = 9, .crm = 14, .opc2 = 2,

      .access = PL1_RW, .type = ARM_CP_ALIAS,

      .fieldoffset = offsetof(CPUARMState, cp15.c9_pminten),

      .writefn = pmintenclr_write },

    { .name = "VBAR", .state = ARM_CP_STATE_BOTH,

      .opc0 = 3, .crn = 12, .crm = 0, .opc1 = 0, .opc2 = 0,

      .access = PL1_RW, .writefn = vbar_write,