Unverified Commit 96df2bc9 authored by Artyom Tarasenko's avatar Artyom Tarasenko
Browse files

target-sparc: use SparcV9MMU type for sparc64 I/D-MMUs 



Signed-off-by: default avatarArtyom Tarasenko <atar4qemu@gmail.com>
parent 4797a685

linux-user/main.c

+1 −1
Original line number Diff line number Diff line
@@ -1166,7 +1166,7 @@ void cpu_loop (CPUSPARCState *env) 
                /* XXX: check env->error_code */

                info.si_code = TARGET_SEGV_MAPERR;

                if (trapnr == TT_DFAULT)

                    info._sifields._sigfault._addr = env->dmmuregs[4];

                    info._sifields._sigfault._addr = env->dmmu.mmuregs[4];

                else

                    info._sifields._sigfault._addr = cpu_tsptr(env)->tpc;

                queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);

target/sparc/cpu.h

+18 −30
Original line number Diff line number Diff line
@@ -404,7 +404,22 @@ struct CPUTimer 
typedef struct CPUTimer CPUTimer;



typedef struct CPUSPARCState CPUSPARCState;



#if defined(TARGET_SPARC64)

typedef union {

   uint64_t mmuregs[16];

   struct {

    uint64_t tsb_tag_target;

    uint64_t mmu_primary_context;

    uint64_t mmu_secondary_context;

    uint64_t sfsr;

    uint64_t sfar;

    uint64_t tsb;

    uint64_t tag_access;

    uint64_t virtual_watchpoint;

    uint64_t physical_watchpoint;

   };

} SparcV9MMU;

#endif

struct CPUSPARCState {

    target_ulong gregs[8]; /* general registers */

    target_ulong *regwptr; /* pointer to current register window */
@@ -457,35 +472,8 @@ struct CPUSPARCState { 
    uint64_t lsu;

#define DMMU_E 0x8

#define IMMU_E 0x4

    //typedef struct SparcMMU

    union {

        uint64_t immuregs[16];

        struct {

            uint64_t tsb_tag_target;

            uint64_t unused_mmu_primary_context;   // use DMMU

            uint64_t unused_mmu_secondary_context; // use DMMU

            uint64_t sfsr;

            uint64_t sfar;

            uint64_t tsb;

            uint64_t tag_access;

            uint64_t virtual_watchpoint;

            uint64_t physical_watchpoint;

        } immu;

    };

    union {

        uint64_t dmmuregs[16];

        struct {

            uint64_t tsb_tag_target;

            uint64_t mmu_primary_context;

            uint64_t mmu_secondary_context;

            uint64_t sfsr;

            uint64_t sfar;

            uint64_t tsb;

            uint64_t tag_access;

            uint64_t virtual_watchpoint;

            uint64_t physical_watchpoint;

        } dmmu;

    };

    SparcV9MMU immu;

    SparcV9MMU dmmu;

    SparcTLBEntry itlb[64];

    SparcTLBEntry dtlb[64];

    uint32_t mmu_version;

target/sparc/ldst_helper.c

+4 −4
Original line number Diff line number Diff line
@@ -1483,7 +1483,7 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, target_ulong val, 
            int reg = (addr >> 3) & 0xf;

            uint64_t oldreg;



            oldreg = env->immuregs[reg];

            oldreg = env->immu.mmuregs[reg];

            switch (reg) {

            case 0: /* RO */

                return;
@@ -1514,7 +1514,7 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, target_ulong val, 
                break;

            }



            if (oldreg != env->immuregs[reg]) {

            if (oldreg != env->immu.mmuregs[reg]) {

                DPRINTF_MMU("immu change reg[%d]: 0x%016" PRIx64 " -> 0x%016"

                            PRIx64 "\n", reg, oldreg, env->immuregs[reg]);

            }
@@ -1548,7 +1548,7 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, target_ulong val, 
            int reg = (addr >> 3) & 0xf;

            uint64_t oldreg;



            oldreg = env->dmmuregs[reg];

            oldreg = env->dmmu.mmuregs[reg];

            switch (reg) {

            case 0: /* RO */

            case 4:
@@ -1591,7 +1591,7 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, target_ulong val, 
                break;

            }



            if (oldreg != env->dmmuregs[reg]) {

            if (oldreg != env->dmmu.mmuregs[reg]) {

                DPRINTF_MMU("dmmu change reg[%d]: 0x%016" PRIx64 " -> 0x%016"

                            PRIx64 "\n", reg, oldreg, env->dmmuregs[reg]);

            }

target/sparc/machine.c

+2 −2
Original line number Diff line number Diff line
@@ -148,8 +148,8 @@ const VMStateDescription vmstate_sparc_cpu = { 
        VMSTATE_UINT64_ARRAY(env.mmubpregs, SPARCCPU, 4),

#else

        VMSTATE_UINT64(env.lsu, SPARCCPU),

        VMSTATE_UINT64_ARRAY(env.immuregs, SPARCCPU, 16),

        VMSTATE_UINT64_ARRAY(env.dmmuregs, SPARCCPU, 16),

        VMSTATE_UINT64_ARRAY(env.immu.mmuregs, SPARCCPU, 16),

        VMSTATE_UINT64_ARRAY(env.dmmu.mmuregs, SPARCCPU, 16),

        VMSTATE_STRUCT_ARRAY(env.itlb, SPARCCPU, 64, 0,

                             vmstate_tlb_entry, SparcTLBEntry),

        VMSTATE_STRUCT_ARRAY(env.dtlb, SPARCCPU, 64, 0,