Loading hw/sparc/leon3.c +16 −1 Original line number Diff line number Diff line Loading @@ -49,6 +49,10 @@ #define LEON3_IRQMP_OFFSET (0x80000200) #define LEON3_TIMER_OFFSET (0x80000300) #define LEON3_TIMER_IRQ (6) #define LEON3_TIMER_COUNT (2) typedef struct ResetData { SPARCCPU *cpu; uint32_t entry; /* save kernel entry in case of reset */ Loading Loading @@ -124,6 +128,7 @@ static void leon3_generic_hw_init(MachineState *machine) int prom_size; ResetData *reset_info; DeviceState *dev; int i; /* Init CPU */ cpu = SPARC_CPU(cpu_create(machine->cpu_type)); Loading Loading @@ -220,7 +225,17 @@ static void leon3_generic_hw_init(MachineState *machine) } /* Allocate timers */ grlib_gptimer_create(0x80000300, 2, CPU_CLK, cpu_irqs, 6); dev = qdev_create(NULL, TYPE_GRLIB_GPTIMER); qdev_prop_set_uint32(dev, "nr-timers", LEON3_TIMER_COUNT); qdev_prop_set_uint32(dev, "frequency", CPU_CLK); qdev_prop_set_uint32(dev, "irq-line", LEON3_TIMER_IRQ); qdev_init_nofail(dev); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, LEON3_TIMER_OFFSET); for (i = 0; i < LEON3_TIMER_COUNT; i++) { sysbus_connect_irq(SYS_BUS_DEVICE(dev), i, cpu_irqs[LEON3_TIMER_IRQ + i]); } /* Allocate uart */ if (serial_hd(0)) { Loading hw/timer/grlib_gptimer.c +2 −2 Original line number Diff line number Diff line /* * QEMU GRLIB GPTimer Emulator * * Copyright (c) 2010-2011 AdaCore * Copyright (c) 2010-2019 AdaCore * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal Loading @@ -23,6 +23,7 @@ */ #include "qemu/osdep.h" #include "hw/sparc/grlib.h" #include "hw/sysbus.h" #include "qemu/timer.h" #include "hw/ptimer.h" Loading Loading @@ -52,7 +53,6 @@ #define COUNTER_RELOAD_OFFSET 0x04 #define TIMER_BASE 0x10 #define TYPE_GRLIB_GPTIMER "grlib,gptimer" #define GRLIB_GPTIMER(obj) \ OBJECT_CHECK(GPTimerUnit, (obj), TYPE_GRLIB_GPTIMER) Loading include/hw/sparc/grlib.h +1 −26 Original line number Diff line number Diff line Loading @@ -42,32 +42,7 @@ void grlib_irqmp_set_irq(void *opaque, int irq, int level); void grlib_irqmp_ack(DeviceState *dev, int intno); /* GPTimer */ static inline DeviceState *grlib_gptimer_create(hwaddr base, uint32_t nr_timers, uint32_t freq, qemu_irq *cpu_irqs, int base_irq) { DeviceState *dev; int i; dev = qdev_create(NULL, "grlib,gptimer"); qdev_prop_set_uint32(dev, "nr-timers", nr_timers); qdev_prop_set_uint32(dev, "frequency", freq); qdev_prop_set_uint32(dev, "irq-line", base_irq); qdev_init_nofail(dev); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); for (i = 0; i < nr_timers; i++) { sysbus_connect_irq(SYS_BUS_DEVICE(dev), i, cpu_irqs[base_irq + i]); } return dev; } #define TYPE_GRLIB_GPTIMER "grlib,gptimer" /* APB UART */ Loading Loading
hw/sparc/leon3.c +16 −1 Original line number Diff line number Diff line Loading @@ -49,6 +49,10 @@ #define LEON3_IRQMP_OFFSET (0x80000200) #define LEON3_TIMER_OFFSET (0x80000300) #define LEON3_TIMER_IRQ (6) #define LEON3_TIMER_COUNT (2) typedef struct ResetData { SPARCCPU *cpu; uint32_t entry; /* save kernel entry in case of reset */ Loading Loading @@ -124,6 +128,7 @@ static void leon3_generic_hw_init(MachineState *machine) int prom_size; ResetData *reset_info; DeviceState *dev; int i; /* Init CPU */ cpu = SPARC_CPU(cpu_create(machine->cpu_type)); Loading Loading @@ -220,7 +225,17 @@ static void leon3_generic_hw_init(MachineState *machine) } /* Allocate timers */ grlib_gptimer_create(0x80000300, 2, CPU_CLK, cpu_irqs, 6); dev = qdev_create(NULL, TYPE_GRLIB_GPTIMER); qdev_prop_set_uint32(dev, "nr-timers", LEON3_TIMER_COUNT); qdev_prop_set_uint32(dev, "frequency", CPU_CLK); qdev_prop_set_uint32(dev, "irq-line", LEON3_TIMER_IRQ); qdev_init_nofail(dev); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, LEON3_TIMER_OFFSET); for (i = 0; i < LEON3_TIMER_COUNT; i++) { sysbus_connect_irq(SYS_BUS_DEVICE(dev), i, cpu_irqs[LEON3_TIMER_IRQ + i]); } /* Allocate uart */ if (serial_hd(0)) { Loading
hw/timer/grlib_gptimer.c +2 −2 Original line number Diff line number Diff line /* * QEMU GRLIB GPTimer Emulator * * Copyright (c) 2010-2011 AdaCore * Copyright (c) 2010-2019 AdaCore * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal Loading @@ -23,6 +23,7 @@ */ #include "qemu/osdep.h" #include "hw/sparc/grlib.h" #include "hw/sysbus.h" #include "qemu/timer.h" #include "hw/ptimer.h" Loading Loading @@ -52,7 +53,6 @@ #define COUNTER_RELOAD_OFFSET 0x04 #define TIMER_BASE 0x10 #define TYPE_GRLIB_GPTIMER "grlib,gptimer" #define GRLIB_GPTIMER(obj) \ OBJECT_CHECK(GPTimerUnit, (obj), TYPE_GRLIB_GPTIMER) Loading
include/hw/sparc/grlib.h +1 −26 Original line number Diff line number Diff line Loading @@ -42,32 +42,7 @@ void grlib_irqmp_set_irq(void *opaque, int irq, int level); void grlib_irqmp_ack(DeviceState *dev, int intno); /* GPTimer */ static inline DeviceState *grlib_gptimer_create(hwaddr base, uint32_t nr_timers, uint32_t freq, qemu_irq *cpu_irqs, int base_irq) { DeviceState *dev; int i; dev = qdev_create(NULL, "grlib,gptimer"); qdev_prop_set_uint32(dev, "nr-timers", nr_timers); qdev_prop_set_uint32(dev, "frequency", freq); qdev_prop_set_uint32(dev, "irq-line", base_irq); qdev_init_nofail(dev); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); for (i = 0; i < nr_timers; i++) { sysbus_connect_irq(SYS_BUS_DEVICE(dev), i, cpu_irqs[base_irq + i]); } return dev; } #define TYPE_GRLIB_GPTIMER "grlib,gptimer" /* APB UART */ Loading