Loading target/tricore/fpu_helper.c +27 −0 Original line number Diff line number Diff line Loading @@ -215,3 +215,30 @@ uint32_t helper_itof(CPUTriCoreState *env, uint32_t arg) } return (uint32_t)f_result; } uint32_t helper_ftouz(CPUTriCoreState *env, uint32_t arg) { float32 f_arg = make_float32(arg); uint32_t result; int32_t flags; result = float32_to_uint32_round_to_zero(f_arg, &env->fp_status); flags = f_get_excp_flags(env); if (flags & float_flag_invalid) { flags &= ~float_flag_inexact; if (float32_is_any_nan(f_arg)) { result = 0; } } else if (float32_lt_quiet(f_arg, 0, &env->fp_status)) { flags = float_flag_invalid; result = 0; } if (flags) { f_update_psw_flags(env, flags); } else { env->FPU_FS = 0; } return result; } target/tricore/helper.h +1 −0 Original line number Diff line number Diff line Loading @@ -112,6 +112,7 @@ DEF_HELPER_3(fdiv, i32, env, i32, i32) DEF_HELPER_3(fcmp, i32, env, i32, i32) DEF_HELPER_2(ftoi, i32, env, i32) DEF_HELPER_2(itof, i32, env, i32) DEF_HELPER_2(ftouz, i32, env, i32) /* dvinit */ DEF_HELPER_3(dvinit_b_13, i64, env, i32, i32) DEF_HELPER_3(dvinit_b_131, i64, env, i32, i32) Loading target/tricore/translate.c +3 −0 Original line number Diff line number Diff line Loading @@ -6698,6 +6698,9 @@ static void decode_rr_divide(CPUTriCoreState *env, DisasContext *ctx) case OPC2_32_RR_ITOF: gen_helper_itof(cpu_gpr_d[r3], cpu_env, cpu_gpr_d[r1]); break; case OPC2_32_RR_FTOUZ: gen_helper_ftouz(cpu_gpr_d[r3], cpu_env, cpu_gpr_d[r1]); break; default: generate_trap(ctx, TRAPC_INSN_ERR, TIN2_IOPC); } Loading Loading
target/tricore/fpu_helper.c +27 −0 Original line number Diff line number Diff line Loading @@ -215,3 +215,30 @@ uint32_t helper_itof(CPUTriCoreState *env, uint32_t arg) } return (uint32_t)f_result; } uint32_t helper_ftouz(CPUTriCoreState *env, uint32_t arg) { float32 f_arg = make_float32(arg); uint32_t result; int32_t flags; result = float32_to_uint32_round_to_zero(f_arg, &env->fp_status); flags = f_get_excp_flags(env); if (flags & float_flag_invalid) { flags &= ~float_flag_inexact; if (float32_is_any_nan(f_arg)) { result = 0; } } else if (float32_lt_quiet(f_arg, 0, &env->fp_status)) { flags = float_flag_invalid; result = 0; } if (flags) { f_update_psw_flags(env, flags); } else { env->FPU_FS = 0; } return result; }
target/tricore/helper.h +1 −0 Original line number Diff line number Diff line Loading @@ -112,6 +112,7 @@ DEF_HELPER_3(fdiv, i32, env, i32, i32) DEF_HELPER_3(fcmp, i32, env, i32, i32) DEF_HELPER_2(ftoi, i32, env, i32) DEF_HELPER_2(itof, i32, env, i32) DEF_HELPER_2(ftouz, i32, env, i32) /* dvinit */ DEF_HELPER_3(dvinit_b_13, i64, env, i32, i32) DEF_HELPER_3(dvinit_b_131, i64, env, i32, i32) Loading
target/tricore/translate.c +3 −0 Original line number Diff line number Diff line Loading @@ -6698,6 +6698,9 @@ static void decode_rr_divide(CPUTriCoreState *env, DisasContext *ctx) case OPC2_32_RR_ITOF: gen_helper_itof(cpu_gpr_d[r3], cpu_env, cpu_gpr_d[r1]); break; case OPC2_32_RR_FTOUZ: gen_helper_ftouz(cpu_gpr_d[r3], cpu_env, cpu_gpr_d[r1]); break; default: generate_trap(ctx, TRAPC_INSN_ERR, TIN2_IOPC); } Loading