Commit 8e3cf49c authored by Peter Maydell's avatar Peter Maydell
Browse files

Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging 



pc, pci, vhost: fixes

Some fixes all over the place.

Signed-off-by: default avatarMichael S. Tsirkin <mst@redhat.com>

# gpg: Signature made Thu 08 Jun 2017 20:04:24 BST
# gpg:                using RSA key 0x281F0DB8D28D5469
# gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>"
# gpg:                 aka "Michael S. Tsirkin <mst@redhat.com>"
# Primary key fingerprint: 0270 606B 6F3C DF3D 0B17  0970 C350 3912 AFBE 8E67
#      Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA  8A0D 281F 0DB8 D28D 5469

* remotes/mst/tags/for_upstream:
  hw/pcie: fix the generic pcie root port to support migration
  nvdimm acpi: fix region format interface code
  vhost-user-bridge: fix iov_restore_front() warning

Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parents f4f3082b bc277a52

hw/acpi/nvdimm.c

+4 −3
Original line number Diff line number Diff line
@@ -338,9 +338,10 @@ static void nvdimm_build_structure_dcr(GArray *structures, DeviceState *dev) 
    nfit_dcr->revision_id = cpu_to_le16(1 /* Current Revision supported

                                             in ACPI 6.0 is 1. */);

    nfit_dcr->serial_number = cpu_to_le32(sn);

    nfit_dcr->fic = cpu_to_le16(0x201 /* Format Interface Code. See Chapter

                                         2: NVDIMM Device Specific Method

                                         (DSM) in DSM Spec Rev1.*/);

    nfit_dcr->fic = cpu_to_le16(0x301 /* Format Interface Code:

                                         Byte addressable, no energy backed.

                                         See ACPI 6.2, sect 5.2.25.6 and

                                         JEDEC Annex L Release 3. */);

}



static GArray *nvdimm_build_device_structure(void)

hw/pci-bridge/gen_pcie_root_port.c

+25 −0
Original line number Diff line number Diff line
@@ -20,6 +20,14 @@ 
#define GEN_PCIE_ROOT_PORT_AER_OFFSET           0x100

#define GEN_PCIE_ROOT_PORT_MSIX_NR_VECTOR       1



typedef struct GenPCIERootPort {

    /*< private >*/

    PCIESlot parent_obj;

    /*< public >*/



    bool migrate_msix;

} GenPCIERootPort;



static uint8_t gen_rp_aer_vector(const PCIDevice *d)

{

    return 0;
@@ -45,6 +53,13 @@ static void gen_rp_interrupts_uninit(PCIDevice *d) 
    msix_uninit_exclusive_bar(d);

}



static bool gen_rp_test_migrate_msix(void *opaque, int version_id)

{

    GenPCIERootPort *rp = opaque;



    return rp->migrate_msix;

}



static const VMStateDescription vmstate_rp_dev = {

    .name = "pcie-root-port",

    .version_id = 1,
@@ -54,10 +69,18 @@ static const VMStateDescription vmstate_rp_dev = { 
        VMSTATE_PCI_DEVICE(parent_obj.parent_obj.parent_obj, PCIESlot),

        VMSTATE_STRUCT(parent_obj.parent_obj.parent_obj.exp.aer_log,

                       PCIESlot, 0, vmstate_pcie_aer_log, PCIEAERLog),

        VMSTATE_MSIX_TEST(parent_obj.parent_obj.parent_obj.parent_obj,

                          GenPCIERootPort,

                          gen_rp_test_migrate_msix),

        VMSTATE_END_OF_LIST()

    }

};



static Property gen_rp_props[] = {

    DEFINE_PROP_BOOL("x-migrate-msix", GenPCIERootPort, migrate_msix, true),

    DEFINE_PROP_END_OF_LIST()

};



static void gen_rp_dev_class_init(ObjectClass *klass, void *data)

{

    DeviceClass *dc = DEVICE_CLASS(klass);
@@ -68,6 +91,7 @@ static void gen_rp_dev_class_init(ObjectClass *klass, void *data) 
    k->device_id = PCI_DEVICE_ID_REDHAT_PCIE_RP;

    dc->desc = "PCI Express Root Port";

    dc->vmsd = &vmstate_rp_dev;

    dc->props = gen_rp_props;

    rpc->aer_vector = gen_rp_aer_vector;

    rpc->interrupts_init = gen_rp_interrupts_init;

    rpc->interrupts_uninit = gen_rp_interrupts_uninit;
@@ -77,6 +101,7 @@ static void gen_rp_dev_class_init(ObjectClass *klass, void *data) 
static const TypeInfo gen_rp_dev_info = {

    .name          = TYPE_GEN_PCIE_ROOT_PORT,

    .parent        = TYPE_PCIE_ROOT_PORT,

    .instance_size = sizeof(GenPCIERootPort),

    .class_init    = gen_rp_dev_class_init,

};

include/hw/compat.h

+4 −0
Original line number Diff line number Diff line
@@ -14,6 +14,10 @@ 
        .driver   = "virtio-net-device",\

        .property = "x-mtu-bypass-backend",\

        .value    = "off",\

    },{\

        .driver   = "pcie-root-port",\

        .property = "x-migrate-msix",\

        .value    = "false",\

    },



#define HW_COMPAT_2_8 \

tests/vhost-user-bridge.c

+9 −2
Original line number Diff line number Diff line
@@ -220,12 +220,18 @@ vubr_handle_tx(VuDev *dev, int qidx) 
    free(elem);

}





/* this function reverse the effect of iov_discard_front() it must be

 * called with 'front' being the original struct iovec and 'bytes'

 * being the number of bytes you shaved off

 */

static void

iov_restore_front(struct iovec *front, struct iovec *iov, size_t bytes)

{

    struct iovec *cur;



    for (cur = front; front != iov; cur++) {

    for (cur = front; cur != iov; cur++) {

        assert(bytes >= cur->iov_len);

        bytes -= cur->iov_len;

    }
@@ -302,7 +308,8 @@ vubr_backend_recv_cb(int sock, void *ctx) 
            }

            iov_from_buf(sg, elem->in_num, 0, &hdr, sizeof hdr);

            total += hdrlen;

            assert(iov_discard_front(&sg, &num, hdrlen) == hdrlen);

            ret = iov_discard_front(&sg, &num, hdrlen);

            assert(ret == hdrlen);

        }



        struct msghdr msg = {