Commit 891ff9f4 authored by Peter Maydell's avatar Peter Maydell
Browse files

Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-4.0-20181221' into staging 



ppc patch queue 2018-12-21

This pull request supersedes the one from 2018-12-13.

This is a revised first ppc pull request for qemu-4.0.  Highlights
are:

 * Most of the code for the POWER9 "XIVE" interrupt controller
   (not complete yet, but we're getting there)
 * A number of g_new vs. g_malloc cleanups
 * Some IRQ wiring cleanups
 * A fix for how we advertise NUMA nodes to the guest for pseries

# gpg: Signature made Fri 21 Dec 2018 05:34:12 GMT
# gpg:                using RSA key 6C38CACA20D9B392
# gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>"
# gpg:                 aka "David Gibson (Red Hat) <dgibson@redhat.com>"
# gpg:                 aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>"
# gpg:                 aka "David Gibson (kernel.org) <dwg@kernel.org>"
# Primary key fingerprint: 75F4 6586 AE61 A66C C44E  87DC 6C38 CACA 20D9 B392

* remotes/dgibson/tags/ppc-for-4.0-20181221: (40 commits)
  MAINTAINERS: PPC: add a XIVE section
  spapr: change default CPU type to POWER9
  spapr: introduce an 'ic-mode' machine option
  spapr: add an extra OV5 field to the sPAPR IRQ backend
  spapr: add a 'reset' method to the sPAPR IRQ backend
  spapr: extend the sPAPR IRQ backend for XICS migration
  spapr: allocate the interrupt thread context under the CPU core
  spapr: add device tree support for the XIVE exploitation mode
  spapr: add hcalls support for the XIVE exploitation interrupt mode
  spapr: introduce a new machine IRQ backend for XIVE
  spapr-iommu: Always advertise the maximum possible DMA window size
  spapr/xive: use the VCPU id as a NVT identifier
  spapr/xive: introduce a XIVE interrupt controller
  ppc/xive: notify the CPU when the interrupt priority is more privileged
  ppc/xive: introduce a simplified XIVE presenter
  ppc/xive: introduce the XIVE interrupt thread context
  ppc/xive: add support for the END Event State Buffers
  Changes requirement for "vsubsbs" instruction
  spapr: export and rename the xics_max_server_number() routine
  spapr: introduce a spapr_irq_init() routine
  ...

Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parents 15763776 b62c6e12

MAINTAINERS

+8 −0
Original line number Diff line number Diff line
@@ -1011,6 +1011,14 @@ F: tests/libqos/*spapr* 
F: tests/rtas*

F: tests/libqos/rtas*



XIVE

M: David Gibson <david@gibson.dropbear.id.au>

M: Cédric Le Goater <clg@kaod.org>

L: qemu-ppc@nongnu.org

S: Supported

F: hw/*/*xive*

F: include/hw/*/*xive*



virtex_ml507

M: Edgar E. Iglesias <edgar.iglesias@gmail.com>

L: qemu-ppc@nongnu.org

default-configs/ppc64-softmmu.mak

+2 −0
Original line number Diff line number Diff line
@@ -16,6 +16,8 @@ CONFIG_VIRTIO_VGA=y 
CONFIG_XICS=$(CONFIG_PSERIES)

CONFIG_XICS_SPAPR=$(CONFIG_PSERIES)

CONFIG_XICS_KVM=$(call land,$(CONFIG_PSERIES),$(CONFIG_KVM))

CONFIG_XIVE=$(CONFIG_PSERIES)

CONFIG_XIVE_SPAPR=$(CONFIG_PSERIES)

CONFIG_MEM_DEVICE=y

CONFIG_DIMM=y

CONFIG_SPAPR_RNG=y

disas/ppc.c

+2 −0
Original line number Diff line number Diff line
@@ -3734,6 +3734,8 @@ const struct powerpc_opcode powerpc_opcodes[] = { 
{ "addmeo.", XO(31,234,1,1), XORB_MASK, PPCCOM,		{ RT, RA } },

{ "ameo.",   XO(31,234,1,1), XORB_MASK, PWRCOM,		{ RT, RA } },



{ "addex",   XO(31,170,0,0), XO_MASK,   POWER9,         { RT, RA, RB } },



{ "mullw",   XO(31,235,0,0), XO_MASK,	PPCCOM,		{ RT, RA, RB } },

{ "muls",    XO(31,235,0,0), XO_MASK,	PWRCOM,		{ RT, RA, RB } },

{ "mullw.",  XO(31,235,0,1), XO_MASK,	PPCCOM,		{ RT, RA, RB } },

hw/intc/Makefile.objs

+2 −0
Original line number Diff line number Diff line
@@ -37,6 +37,8 @@ obj-$(CONFIG_SH4) += sh_intc.o 
obj-$(CONFIG_XICS) += xics.o

obj-$(CONFIG_XICS_SPAPR) += xics_spapr.o

obj-$(CONFIG_XICS_KVM) += xics_kvm.o

obj-$(CONFIG_XIVE) += xive.o

obj-$(CONFIG_XIVE_SPAPR) += spapr_xive.o

obj-$(CONFIG_POWERNV) += xics_pnv.o

obj-$(CONFIG_ALLWINNER_A10_PIC) += allwinner-a10-pic.o

obj-$(CONFIG_S390_FLIC) += s390_flic.o

hw/intc/spapr_xive.c

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