Loading cpu-exec.c +3 −10 Original line number Diff line number Diff line Loading @@ -295,16 +295,10 @@ static inline TranslationBlock *tb_find_fast(CPUArchState *env) return tb; } static CPUDebugExcpHandler *debug_excp_handler; void cpu_set_debug_excp_handler(CPUDebugExcpHandler *handler) { debug_excp_handler = handler; } static void cpu_handle_debug_exception(CPUArchState *env) { CPUState *cpu = ENV_GET_CPU(env); CPUClass *cc = CPU_GET_CLASS(cpu); CPUWatchpoint *wp; if (!cpu->watchpoint_hit) { Loading @@ -312,9 +306,8 @@ static void cpu_handle_debug_exception(CPUArchState *env) wp->flags &= ~BP_WATCHPOINT_HIT; } } if (debug_excp_handler) { debug_excp_handler(env); } cc->debug_excp_handler(cpu); } /* main execution loop */ Loading include/exec/exec-all.h +0 −4 Original line number Diff line number Diff line Loading @@ -356,10 +356,6 @@ static inline tb_page_addr_t get_page_addr_code(CPUArchState *env1, target_ulong tb_page_addr_t get_page_addr_code(CPUArchState *env1, target_ulong addr); #endif typedef void (CPUDebugExcpHandler)(CPUArchState *env); void cpu_set_debug_excp_handler(CPUDebugExcpHandler *handler); /* vl.c */ extern int singlestep; Loading include/qom/cpu.h +2 −0 Original line number Diff line number Diff line Loading @@ -95,6 +95,7 @@ struct TranslationBlock; * @get_phys_page_debug: Callback for obtaining a physical address. * @gdb_read_register: Callback for letting GDB read a register. * @gdb_write_register: Callback for letting GDB write a register. * @debug_excp_handler: Callback for handling debug exceptions. * @vmsd: State description for migration. * @gdb_num_core_regs: Number of core registers accessible to GDB. * @gdb_core_xml_file: File name for core registers GDB XML description. Loading Loading @@ -134,6 +135,7 @@ typedef struct CPUClass { hwaddr (*get_phys_page_debug)(CPUState *cpu, vaddr addr); int (*gdb_read_register)(CPUState *cpu, uint8_t *buf, int reg); int (*gdb_write_register)(CPUState *cpu, uint8_t *buf, int reg); void (*debug_excp_handler)(CPUState *cpu); int (*write_elf64_note)(WriteCoreDumpFunction f, CPUState *cpu, int cpuid, void *opaque); Loading qom/cpu.c +5 −0 Original line number Diff line number Diff line Loading @@ -202,6 +202,10 @@ static bool cpu_common_virtio_is_big_endian(CPUState *cpu) return target_words_bigendian(); } static void cpu_common_debug_excp_handler(CPUState *cpu) { } void cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, int flags) { Loading Loading @@ -340,6 +344,7 @@ static void cpu_class_init(ObjectClass *klass, void *data) k->gdb_read_register = cpu_common_gdb_read_register; k->gdb_write_register = cpu_common_gdb_write_register; k->virtio_is_big_endian = cpu_common_virtio_is_big_endian; k->debug_excp_handler = cpu_common_debug_excp_handler; dc->realize = cpu_common_realizefn; /* * Reason: CPUs still need special care by board code: wiring up Loading target-i386/cpu.c +3 −3 Original line number Diff line number Diff line Loading @@ -2843,9 +2843,6 @@ static void x86_cpu_initfn(Object *obj) if (tcg_enabled() && !inited) { inited = 1; optimize_flags_init(); #ifndef CONFIG_USER_ONLY cpu_set_debug_excp_handler(breakpoint_handler); #endif } } Loading Loading @@ -2942,6 +2939,9 @@ static void x86_cpu_common_class_init(ObjectClass *oc, void *data) cc->vmsd = &vmstate_x86_cpu; #endif cc->gdb_num_core_regs = CPU_NB_REGS * 2 + 25; #ifndef CONFIG_USER_ONLY cc->debug_excp_handler = breakpoint_handler; #endif } static const TypeInfo x86_cpu_type_info = { Loading Loading
cpu-exec.c +3 −10 Original line number Diff line number Diff line Loading @@ -295,16 +295,10 @@ static inline TranslationBlock *tb_find_fast(CPUArchState *env) return tb; } static CPUDebugExcpHandler *debug_excp_handler; void cpu_set_debug_excp_handler(CPUDebugExcpHandler *handler) { debug_excp_handler = handler; } static void cpu_handle_debug_exception(CPUArchState *env) { CPUState *cpu = ENV_GET_CPU(env); CPUClass *cc = CPU_GET_CLASS(cpu); CPUWatchpoint *wp; if (!cpu->watchpoint_hit) { Loading @@ -312,9 +306,8 @@ static void cpu_handle_debug_exception(CPUArchState *env) wp->flags &= ~BP_WATCHPOINT_HIT; } } if (debug_excp_handler) { debug_excp_handler(env); } cc->debug_excp_handler(cpu); } /* main execution loop */ Loading
include/exec/exec-all.h +0 −4 Original line number Diff line number Diff line Loading @@ -356,10 +356,6 @@ static inline tb_page_addr_t get_page_addr_code(CPUArchState *env1, target_ulong tb_page_addr_t get_page_addr_code(CPUArchState *env1, target_ulong addr); #endif typedef void (CPUDebugExcpHandler)(CPUArchState *env); void cpu_set_debug_excp_handler(CPUDebugExcpHandler *handler); /* vl.c */ extern int singlestep; Loading
include/qom/cpu.h +2 −0 Original line number Diff line number Diff line Loading @@ -95,6 +95,7 @@ struct TranslationBlock; * @get_phys_page_debug: Callback for obtaining a physical address. * @gdb_read_register: Callback for letting GDB read a register. * @gdb_write_register: Callback for letting GDB write a register. * @debug_excp_handler: Callback for handling debug exceptions. * @vmsd: State description for migration. * @gdb_num_core_regs: Number of core registers accessible to GDB. * @gdb_core_xml_file: File name for core registers GDB XML description. Loading Loading @@ -134,6 +135,7 @@ typedef struct CPUClass { hwaddr (*get_phys_page_debug)(CPUState *cpu, vaddr addr); int (*gdb_read_register)(CPUState *cpu, uint8_t *buf, int reg); int (*gdb_write_register)(CPUState *cpu, uint8_t *buf, int reg); void (*debug_excp_handler)(CPUState *cpu); int (*write_elf64_note)(WriteCoreDumpFunction f, CPUState *cpu, int cpuid, void *opaque); Loading
qom/cpu.c +5 −0 Original line number Diff line number Diff line Loading @@ -202,6 +202,10 @@ static bool cpu_common_virtio_is_big_endian(CPUState *cpu) return target_words_bigendian(); } static void cpu_common_debug_excp_handler(CPUState *cpu) { } void cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, int flags) { Loading Loading @@ -340,6 +344,7 @@ static void cpu_class_init(ObjectClass *klass, void *data) k->gdb_read_register = cpu_common_gdb_read_register; k->gdb_write_register = cpu_common_gdb_write_register; k->virtio_is_big_endian = cpu_common_virtio_is_big_endian; k->debug_excp_handler = cpu_common_debug_excp_handler; dc->realize = cpu_common_realizefn; /* * Reason: CPUs still need special care by board code: wiring up Loading
target-i386/cpu.c +3 −3 Original line number Diff line number Diff line Loading @@ -2843,9 +2843,6 @@ static void x86_cpu_initfn(Object *obj) if (tcg_enabled() && !inited) { inited = 1; optimize_flags_init(); #ifndef CONFIG_USER_ONLY cpu_set_debug_excp_handler(breakpoint_handler); #endif } } Loading Loading @@ -2942,6 +2939,9 @@ static void x86_cpu_common_class_init(ObjectClass *oc, void *data) cc->vmsd = &vmstate_x86_cpu; #endif cc->gdb_num_core_regs = CPU_NB_REGS * 2 + 25; #ifndef CONFIG_USER_ONLY cc->debug_excp_handler = breakpoint_handler; #endif } static const TypeInfo x86_cpu_type_info = { Loading