Commit 85711e6b authored by James Hogan's avatar James Hogan Committed by Aurelien Jarno
Browse files

tcg/mips: fix invalid op definition errors 



tcg/mips/tcg-target.h defines various operations conditionally depending
upon the isa revision, however these operations are included in
mips_op_defs[] unconditionally resulting in the following runtime errors
if CONFIG_DEBUG_TCG is defined:

Invalid op definition for movcond_i32
Invalid op definition for rotl_i32
Invalid op definition for rotr_i32
Invalid op definition for deposit_i32
Invalid op definition for bswap16_i32
Invalid op definition for bswap32_i32
tcg/tcg.c:1196: tcg fatal error

Fix with ifdefs like the i386 backend does for movcond_i32.

Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
Cc: Aurelien Jarno <aurelien@aurel32.net>
Cc: Richard Henderson <rth@twiddle.net>
Signed-off-by: default avatarAurelien Jarno <aurelien@aurel32.net>
parent 6fdf98f2

tcg/mips/tcg-target.c

+10 −0
Original line number Diff line number Diff line
@@ -1617,19 +1617,29 @@ static const TCGTargetOpDef mips_op_defs[] = { 
    { INDEX_op_shl_i32, { "r", "rZ", "ri" } },

    { INDEX_op_shr_i32, { "r", "rZ", "ri" } },

    { INDEX_op_sar_i32, { "r", "rZ", "ri" } },

#if TCG_TARGET_HAS_rot_i32

    { INDEX_op_rotr_i32, { "r", "rZ", "ri" } },

    { INDEX_op_rotl_i32, { "r", "rZ", "ri" } },

#endif



#if TCG_TARGET_HAS_bswap16_i32

    { INDEX_op_bswap16_i32, { "r", "r" } },

#endif

#if TCG_TARGET_HAS_bswap32_i32

    { INDEX_op_bswap32_i32, { "r", "r" } },

#endif



    { INDEX_op_ext8s_i32, { "r", "rZ" } },

    { INDEX_op_ext16s_i32, { "r", "rZ" } },



#if TCG_TARGET_HAS_deposit_i32

    { INDEX_op_deposit_i32, { "r", "0", "rZ" } },

#endif



    { INDEX_op_brcond_i32, { "rZ", "rZ" } },

#if TCG_TARGET_HAS_movcond_i32

    { INDEX_op_movcond_i32, { "r", "rZ", "rZ", "rZ", "0" } },

#endif

    { INDEX_op_setcond_i32, { "r", "rZ", "rZ" } },

    { INDEX_op_setcond2_i32, { "r", "rZ", "rZ", "rZ", "rZ" } },