+6
−0
Loading
Stepping through the SS-5's OBP initialization routines it looks like reading fdc main status register should clear the fd interrupt. The patch doesn't fix problems with fdc on sparc platform, it only fixes fdc detection. Signed-off-by:Artyom Tarasenko <atar4qemu@gmail.com> Signed-off-by:
Blue Swirl <blauwirbel@gmail.com>