Loading cpu-exec.c +12 −5 Original line number Diff line number Diff line Loading @@ -467,12 +467,19 @@ int cpu_exec(CPUArchState *env) do_interrupt(env); next_tb = 0; } if (interrupt_request & CPU_INTERRUPT_NMI && (env->pregs[PR_CCS] & M_FLAG)) { if (interrupt_request & CPU_INTERRUPT_NMI) { unsigned int m_flag_archval; if (env->pregs[PR_VR] < 32) { m_flag_archval = M_FLAG_V10; } else { m_flag_archval = M_FLAG_V32; } if ((env->pregs[PR_CCS] & m_flag_archval)) { env->exception_index = EXCP_NMI; do_interrupt(env); next_tb = 0; } } #elif defined(TARGET_M68K) if (interrupt_request & CPU_INTERRUPT_HARD && ((env->sr & SR_I) >> SR_I_SHIFT) Loading target-cris/cpu.h +2 −1 Original line number Diff line number Diff line Loading @@ -69,13 +69,14 @@ /* CPU flags. */ #define Q_FLAG 0x80000000 #define M_FLAG 0x40000000 #define M_FLAG_V32 0x40000000 #define PFIX_FLAG 0x800 /* CRISv10 Only. */ #define F_FLAG_V10 0x400 #define P_FLAG_V10 0x200 #define S_FLAG 0x200 #define R_FLAG 0x100 #define P_FLAG 0x80 #define M_FLAG_V10 0x80 #define U_FLAG 0x40 #define I_FLAG 0x20 #define X_FLAG 0x10 Loading target-cris/helper.c +2 −2 Original line number Diff line number Diff line Loading @@ -127,7 +127,7 @@ static void do_interruptv10(CPUCRISState *env) case EXCP_NMI: /* NMI is hardwired to vector zero. */ ex_vec = 0; env->pregs[PR_CCS] &= ~M_FLAG; env->pregs[PR_CCS] &= ~M_FLAG_V10; env->pregs[PRV10_BRP] = env->pc; break; Loading Loading @@ -185,7 +185,7 @@ void do_interrupt(CPUCRISState *env) case EXCP_NMI: /* NMI is hardwired to vector zero. */ ex_vec = 0; env->pregs[PR_CCS] &= ~M_FLAG; env->pregs[PR_CCS] &= ~M_FLAG_V32; env->pregs[PR_NRP] = env->pc; break; Loading target-cris/op_helper.c +2 −2 Original line number Diff line number Diff line Loading @@ -248,7 +248,7 @@ void helper_rfn(void) env->pregs[PR_CCS] |= P_FLAG; /* Always set the M flag. */ env->pregs[PR_CCS] |= M_FLAG; env->pregs[PR_CCS] |= M_FLAG_V32; } uint32_t helper_lz(uint32_t t0) Loading Loading
cpu-exec.c +12 −5 Original line number Diff line number Diff line Loading @@ -467,12 +467,19 @@ int cpu_exec(CPUArchState *env) do_interrupt(env); next_tb = 0; } if (interrupt_request & CPU_INTERRUPT_NMI && (env->pregs[PR_CCS] & M_FLAG)) { if (interrupt_request & CPU_INTERRUPT_NMI) { unsigned int m_flag_archval; if (env->pregs[PR_VR] < 32) { m_flag_archval = M_FLAG_V10; } else { m_flag_archval = M_FLAG_V32; } if ((env->pregs[PR_CCS] & m_flag_archval)) { env->exception_index = EXCP_NMI; do_interrupt(env); next_tb = 0; } } #elif defined(TARGET_M68K) if (interrupt_request & CPU_INTERRUPT_HARD && ((env->sr & SR_I) >> SR_I_SHIFT) Loading
target-cris/cpu.h +2 −1 Original line number Diff line number Diff line Loading @@ -69,13 +69,14 @@ /* CPU flags. */ #define Q_FLAG 0x80000000 #define M_FLAG 0x40000000 #define M_FLAG_V32 0x40000000 #define PFIX_FLAG 0x800 /* CRISv10 Only. */ #define F_FLAG_V10 0x400 #define P_FLAG_V10 0x200 #define S_FLAG 0x200 #define R_FLAG 0x100 #define P_FLAG 0x80 #define M_FLAG_V10 0x80 #define U_FLAG 0x40 #define I_FLAG 0x20 #define X_FLAG 0x10 Loading
target-cris/helper.c +2 −2 Original line number Diff line number Diff line Loading @@ -127,7 +127,7 @@ static void do_interruptv10(CPUCRISState *env) case EXCP_NMI: /* NMI is hardwired to vector zero. */ ex_vec = 0; env->pregs[PR_CCS] &= ~M_FLAG; env->pregs[PR_CCS] &= ~M_FLAG_V10; env->pregs[PRV10_BRP] = env->pc; break; Loading Loading @@ -185,7 +185,7 @@ void do_interrupt(CPUCRISState *env) case EXCP_NMI: /* NMI is hardwired to vector zero. */ ex_vec = 0; env->pregs[PR_CCS] &= ~M_FLAG; env->pregs[PR_CCS] &= ~M_FLAG_V32; env->pregs[PR_NRP] = env->pc; break; Loading
target-cris/op_helper.c +2 −2 Original line number Diff line number Diff line Loading @@ -248,7 +248,7 @@ void helper_rfn(void) env->pregs[PR_CCS] |= P_FLAG; /* Always set the M flag. */ env->pregs[PR_CCS] |= M_FLAG; env->pregs[PR_CCS] |= M_FLAG_V32; } uint32_t helper_lz(uint32_t t0) Loading