Commit 81fb1e64 authored by Peter Xu's avatar Peter Xu Committed by Michael S. Tsirkin
Browse files

intel_iommu: Drop extended root field 



VTD_RTADDR_RTT is dropped even by the VT-d spec, so QEMU should
probably do the same thing (after all we never really implemented it).
Since we've had a field for that in the migration stream, to keep
compatibility we need to fill the hole up.

Please refer to VT-d spec 10.4.6.

Signed-off-by: default avatarPeter Xu <peterx@redhat.com>
Message-Id: <20190329061422.7926-3-peterx@redhat.com>
Reviewed-by: default avatarLiu, Yi L <yi.l.liu@intel.com>
Acked-by: default avatarDr. David Alan Gilbert <dgilbert@redhat.com>
Reviewed-by: default avatarMichael S. Tsirkin <mst@redhat.com>
Signed-off-by: default avatarMichael S. Tsirkin <mst@redhat.com>
parent 2811af3b

hw/i386/intel_iommu.c

+2 −4
Original line number Diff line number Diff line
@@ -1718,12 +1718,11 @@ error: 
static void vtd_root_table_setup(IntelIOMMUState *s)

{

    s->root = vtd_get_quad_raw(s, DMAR_RTADDR_REG);

    s->root_extended = s->root & VTD_RTADDR_RTT;

    s->root &= VTD_RTADDR_ADDR_MASK(s->aw_bits);



    vtd_update_scalable_state(s);



    trace_vtd_reg_dmar_root(s->root, s->root_extended);

    trace_vtd_reg_dmar_root(s->root, s->root_scalable);

}



static void vtd_iec_notify_all(IntelIOMMUState *s, bool global,
@@ -2982,7 +2981,7 @@ static const VMStateDescription vtd_vmstate = { 
        VMSTATE_UINT16(next_frcd_reg, IntelIOMMUState),

        VMSTATE_UINT8_ARRAY(csr, IntelIOMMUState, DMAR_REG_SIZE),

        VMSTATE_UINT8(iq_last_desc_type, IntelIOMMUState),

        VMSTATE_BOOL(root_extended, IntelIOMMUState),

        VMSTATE_UNUSED(1),      /* bool root_extended is obsolete by VT-d */

        VMSTATE_BOOL(dmar_enabled, IntelIOMMUState),

        VMSTATE_BOOL(qi_enabled, IntelIOMMUState),

        VMSTATE_BOOL(intr_enabled, IntelIOMMUState),
@@ -3503,7 +3502,6 @@ static void vtd_init(IntelIOMMUState *s) 
    memset(s->womask, 0, DMAR_REG_SIZE);



    s->root = 0;

    s->root_extended = false;

    s->root_scalable = false;

    s->dmar_enabled = false;

    s->intr_enabled = false;

hw/i386/intel_iommu_internal.h

+0 −1
Original line number Diff line number Diff line
@@ -171,7 +171,6 @@ 
#define VTD_CCMD_FM(val)            (((val) >> 32) & 3ULL)



/* RTADDR_REG */

#define VTD_RTADDR_RTT              (1ULL << 11)

#define VTD_RTADDR_SMT              (1ULL << 10)

#define VTD_RTADDR_ADDR_MASK(aw)    (VTD_HAW_MASK(aw) ^ 0xfffULL)

hw/i386/trace-events

+1 −1
Original line number Diff line number Diff line
@@ -45,7 +45,7 @@ vtd_pt_enable_fast_path(uint16_t sid, bool success) "sid 0x%"PRIu16" %d" 
vtd_irq_generate(uint64_t addr, uint64_t data) "addr 0x%"PRIx64" data 0x%"PRIx64

vtd_reg_read(uint64_t addr, uint64_t size) "addr 0x%"PRIx64" size 0x%"PRIx64

vtd_reg_write(uint64_t addr, uint64_t size, uint64_t val) "addr 0x%"PRIx64" size 0x%"PRIx64" value 0x%"PRIx64

vtd_reg_dmar_root(uint64_t addr, bool extended) "addr 0x%"PRIx64" extended %d"

vtd_reg_dmar_root(uint64_t addr, bool scalable) "addr 0x%"PRIx64" scalable %d"

vtd_reg_ir_root(uint64_t addr, uint32_t size) "addr 0x%"PRIx64" size 0x%"PRIx32

vtd_reg_write_gcmd(uint32_t status, uint32_t val) "status 0x%"PRIx32" value 0x%"PRIx32

vtd_reg_write_fectl(uint32_t value) "value 0x%"PRIx32

include/hw/i386/intel_iommu.h

+0 −1
Original line number Diff line number Diff line
@@ -234,7 +234,6 @@ struct IntelIOMMUState { 
    bool scalable_mode;             /* RO - is Scalable Mode supported? */



    dma_addr_t root;                /* Current root table pointer */

    bool root_extended;             /* Type of root table (extended or not) */

    bool root_scalable;             /* Type of root table (scalable or not) */

    bool dmar_enabled;              /* Set if DMA remapping is enabled */