Commit 7fa76c0b authored by Blue Swirl's avatar Blue Swirl
Browse files

Complete the TCG conversion 

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4323 c046a42c-6fe2-441c-8c8c-71466251a162
parent db502b61

configure

+6 −0
Original line number Diff line number Diff line
@@ -1291,24 +1291,30 @@ case "$target_cpu" in 
  ;;

  sparc)

    echo "TARGET_ARCH=sparc" >> $config_mak

    echo "CONFIG_NO_DYNGEN_OP=yes" >> $config_mak

    echo "#define TARGET_ARCH \"sparc\"" >> $config_h

    echo "#define TARGET_SPARC 1" >> $config_h

    echo "#define CONFIG_NO_DYNGEN_OP 1" >> $config_h

  ;;

  sparc64)

    echo "TARGET_ARCH=sparc64" >> $config_mak

    echo "CONFIG_NO_DYNGEN_OP=yes" >> $config_mak

    echo "#define TARGET_ARCH \"sparc64\"" >> $config_h

    echo "#define TARGET_SPARC 1" >> $config_h

    echo "#define TARGET_SPARC64 1" >> $config_h

    echo "#define CONFIG_NO_DYNGEN_OP 1" >> $config_h

    elfload32="yes"

  ;;

  sparc32plus)

    echo "TARGET_ARCH=sparc64" >> $config_mak

    echo "TARGET_ABI_DIR=sparc" >> $config_mak

    echo "TARGET_ARCH2=sparc32plus" >> $config_mak

    echo "CONFIG_NO_DYNGEN_OP=yes" >> $config_mak

    echo "#define TARGET_ARCH \"sparc64\"" >> $config_h

    echo "#define TARGET_SPARC 1" >> $config_h

    echo "#define TARGET_SPARC64 1" >> $config_h

    echo "#define TARGET_ABI32 1" >> $config_h

    echo "#define CONFIG_NO_DYNGEN_OP 1" >> $config_h

  ;;

  *)

    echo "Unsupported target CPU"

target-sparc/cpu.h

+2 −4
Original line number Diff line number Diff line
@@ -250,7 +250,7 @@ typedef struct CPUSPARCState { 
    float_status fp_status;

#if defined(TARGET_SPARC64)

#define MAXTL 4

    uint64_t t0, t1, t2;

    uint64_t t0;

    trap_state *tsptr;

    trap_state ts[MAXTL];

    uint32_t xcc;               /* Extended integer condition codes */
@@ -271,9 +271,7 @@ typedef struct CPUSPARCState { 
    uint64_t hpstate, htstate[MAXTL], hintp, htba, hver, hstick_cmpr, ssr;

    void *hstick; // UA 2005

#endif

#if !defined(TARGET_SPARC64) && !defined(reg_T2)

    target_ulong t2;

#endif

    target_ulong t1, t2;

} CPUSPARCState;

#if defined(TARGET_SPARC64)

#define GET_FSR32(env) (env->fsr & 0xcfc1ffff)

target-sparc/exec.h

+0 −2
Original line number Diff line number Diff line
@@ -7,12 +7,10 @@ register struct CPUSPARCState *env asm(AREG0); 


#ifdef TARGET_SPARC64

#define T0 (env->t0)

#define T1 (env->t1)

#define T2 (env->t2)

#define REGWPTR env->regwptr

#else

register uint32_t T0 asm(AREG1);

register uint32_t T1 asm(AREG2);



#undef REG_REGWPTR // Broken

#ifdef REG_REGWPTR

target-sparc/helper.h

+7 −0
Original line number Diff line number Diff line
@@ -45,6 +45,13 @@ void TCG_HELPER_PROTO helper_flush(target_ulong addr); 
target_ulong TCG_HELPER_PROTO helper_udiv(target_ulong a, target_ulong b);

target_ulong TCG_HELPER_PROTO helper_sdiv(target_ulong a, target_ulong b);

uint64_t TCG_HELPER_PROTO helper_pack64(target_ulong high, target_ulong low);

void TCG_HELPER_PROTO helper_std_i386(target_ulong addr, int mem_idx);

void TCG_HELPER_PROTO helper_stdf(target_ulong addr, int mem_idx);

void TCG_HELPER_PROTO helper_lddf(target_ulong addr, int mem_idx);

#if defined(CONFIG_USER_ONLY)

void TCG_HELPER_PROTO helper_ldqf(target_ulong addr);

void TCG_HELPER_PROTO helper_stqf(target_ulong addr);

#endif

uint64_t TCG_HELPER_PROTO helper_ld_asi(target_ulong addr, int asi,

                                        int size, int sign);

void TCG_HELPER_PROTO helper_st_asi(target_ulong addr, uint64_t val, int asi,

target-sparc/op_helper.c

+103 −0
Original line number Diff line number Diff line
@@ -2217,6 +2217,109 @@ uint64_t helper_pack64(target_ulong high, target_ulong low) 
    return ((uint64_t)high << 32) | (uint64_t)(low & 0xffffffff);

}



#ifdef TARGET_ABI32

#define ADDR(x) ((x) & 0xffffffff)

#else

#define ADDR(x) (x)

#endif



#ifdef __i386__

void helper_std_i386(target_ulong addr, int mem_idx)

{

    uint64_t tmp = ((uint64_t)env->t1 << 32) | (uint64_t)(env->t2 & 0xffffffff);



#if !defined(CONFIG_USER_ONLY)

    switch (mem_idx) {

    case 0:

        stq_user(ADDR(addr), tmp);

        break;

    case 1:

        stq_kernel(ADDR(addr), tmp);

        break;

#ifdef TARGET_SPARC64

    case 2:

        stq_hypv(ADDR(addr), tmp);

        break;

#endif

    default:

        break;

    }

#else

    stq_raw(ADDR(addr), tmp);

#endif

}

#endif /* __i386__ */



void helper_stdf(target_ulong addr, int mem_idx)

{

#if !defined(CONFIG_USER_ONLY)

    switch (mem_idx) {

    case 0:

        stfq_user(ADDR(addr), DT0);

        break;

    case 1:

        stfq_kernel(ADDR(addr), DT0);

        break;

#ifdef TARGET_SPARC64

    case 2:

        stfq_hypv(ADDR(addr), DT0);

        break;

#endif

    default:

        break;

    }

#else

    stfq_raw(ADDR(addr), DT0);

#endif

}



void helper_lddf(target_ulong addr, int mem_idx)

{

#if !defined(CONFIG_USER_ONLY)

    switch (mem_idx) {

    case 0:

        DT0 = ldfq_user(ADDR(addr));

        break;

    case 1:

        DT0 = ldfq_kernel(ADDR(addr));

        break;

#ifdef TARGET_SPARC64

    case 2:

        DT0 = ldfq_hypv(ADDR(addr));

        break;

#endif

    default:

        break;

    }

#else

    DT0 = ldfq_raw(ADDR(addr));

#endif

}



#if defined(CONFIG_USER_ONLY)

void helper_ldqf(target_ulong addr)

{

    // XXX add 128 bit load

    CPU_QuadU u;



    u.ll.upper = ldq_raw(ADDR(addr));

    u.ll.lower = ldq_raw(ADDR(addr + 8));

    QT0 = u.q;

}



void helper_stqf(target_ulong addr)

{

    // XXX add 128 bit store

    CPU_QuadU u;



    u.q = QT0;

    stq_raw(ADDR(addr), u.ll.upper);

    stq_raw(ADDR(addr + 8), u.ll.lower);

}

#endif



#undef ADDR



void helper_ldfsr(void)

{

    int rnd_mode;