Commit 7f87c905 authored by Richard Henderson's avatar Richard Henderson
Browse files

target-sparc: Use MMU_PHYS_IDX for bypass asis 



Tested-by: default avatarMark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: default avatarRichard Henderson <rth@twiddle.net>
parent af7a06ba

target-sparc/translate.c

+19 −0
Original line number Diff line number Diff line
@@ -2046,6 +2046,11 @@ static DisasASI get_asi(DisasContext *dc, int insn, TCGMemOp memop) 
            mem_idx = MMU_KERNEL_IDX;

            type = GET_ASI_DIRECT;

            break;

        case ASI_M_BYPASS:    /* MMU passthrough */

        case ASI_LEON_BYPASS: /* LEON MMU passthrough */

            mem_idx = MMU_PHYS_IDX;

            type = GET_ASI_DIRECT;

            break;

        }

    } else {

        gen_exception(dc, TT_PRIV_INSN);
@@ -2066,6 +2071,14 @@ static DisasASI get_asi(DisasContext *dc, int insn, TCGMemOp memop) 
        type = GET_ASI_EXCP;

    } else {

        switch (asi) {

        case ASI_REAL:      /* Bypass */

        case ASI_REAL_IO:   /* Bypass, non-cacheable */

        case ASI_REAL_L:    /* Bypass LE */

        case ASI_REAL_IO_L: /* Bypass, non-cacheable LE */

        case ASI_TWINX_REAL:   /* Real address, twinx */

        case ASI_TWINX_REAL_L: /* Real address, twinx, LE */

            mem_idx = MMU_PHYS_IDX;

            break;

        case ASI_N:  /* Nucleus */

        case ASI_NL: /* Nucleus LE */

        case ASI_TWINX_N:
@@ -2123,6 +2136,10 @@ static DisasASI get_asi(DisasContext *dc, int insn, TCGMemOp memop) 
            break;

        }

        switch (asi) {

        case ASI_REAL:

        case ASI_REAL_IO:

        case ASI_REAL_L:

        case ASI_REAL_IO_L:

        case ASI_N:

        case ASI_NL:

        case ASI_AIUP:
@@ -2135,6 +2152,8 @@ static DisasASI get_asi(DisasContext *dc, int insn, TCGMemOp memop) 
        case ASI_PL:

            type = GET_ASI_DIRECT;

            break;

        case ASI_TWINX_REAL:

        case ASI_TWINX_REAL_L:

        case ASI_TWINX_N:

        case ASI_TWINX_NL:

        case ASI_TWINX_AIUP: