Commit 7e4804da authored by Peter Maydell's avatar Peter Maydell
Browse files

Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20150914' into staging 



target-arm queue:
 * fix GIC region size in xlnx-zynqmp
 * xlnx-zynqmp: Remove unnecessary brackets
 * improve A64 generated TCG code
 * add GPIO devices to i.MX25 and i.MX31
 * more missing pieces for EL2 support

# gpg: Signature made Mon 14 Sep 2015 14:51:12 BST using RSA key ID 14360CDE
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>"
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>"

* remotes/pmaydell/tags/pull-target-arm-20150914: (24 commits)
  target-arm: Add VMPIDR_EL2
  target-arm: Break out mpidr_read_val()
  target-arm: Add VPIDR_EL2
  target-arm: Suppress EPD for S2, EL2 and EL3 translations
  target-arm: Suppress TBI for S2 translations
  target-arm: Add VTTBR_EL2
  target-arm: Add VTCR_EL2
  hw/cpu/{a15mpcore, a9mpcore}: Handle missing has_el3 CPU props gracefully
  i.MX: Add GPIO devices to i.MX25 SOC
  i.MX: Add GPIO devices to i.MX31 SOC
  i.MX: Add GPIO device
  target-arm: Use tcg_gen_extrh_i64_i32
  target-arm: Recognize ROR
  target-arm: Eliminate unnecessary zero-extend in disas_bitfield
  target-arm: Recognize UXTB, UXTH, LSR, LSL
  target-arm: Recognize SXTB, SXTH, SXTW, ASR
  target-arm: Implement fcsel with movcond
  target-arm: Implement ccmp branchless
  target-arm: Use setcond and movcond for csel
  target-arm: Handle always condition codes within arm_test_cc
  ...

Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parents 2b750d9d f0d574d6

hw/arm/fsl-imx25.c

+29 −0
Original line number Diff line number Diff line
@@ -63,6 +63,11 @@ static void fsl_imx25_init(Object *obj) 
        object_initialize(&s->i2c[i], sizeof(s->i2c[i]), TYPE_IMX_I2C);

        qdev_set_parent_bus(DEVICE(&s->i2c[i]), sysbus_get_default());

    }



    for (i = 0; i < FSL_IMX25_NUM_GPIOS; i++) {

        object_initialize(&s->gpio[i], sizeof(s->gpio[i]), TYPE_IMX_GPIO);

        qdev_set_parent_bus(DEVICE(&s->gpio[i]), sysbus_get_default());

    }

}



static void fsl_imx25_realize(DeviceState *dev, Error **errp)
@@ -214,6 +219,30 @@ static void fsl_imx25_realize(DeviceState *dev, Error **errp) 
                                            i2c_table[i].irq));

    }



    /* Initialize all GPIOs */

    for (i = 0; i < FSL_IMX25_NUM_GPIOS; i++) {

        static const struct {

            hwaddr addr;

            unsigned int irq;

        } gpio_table[FSL_IMX25_NUM_GPIOS] = {

            { FSL_IMX25_GPIO1_ADDR, FSL_IMX25_GPIO1_IRQ },

            { FSL_IMX25_GPIO2_ADDR, FSL_IMX25_GPIO2_IRQ },

            { FSL_IMX25_GPIO3_ADDR, FSL_IMX25_GPIO3_IRQ },

            { FSL_IMX25_GPIO4_ADDR, FSL_IMX25_GPIO4_IRQ }

        };



        object_property_set_bool(OBJECT(&s->gpio[i]), true, "realized", &err);

        if (err) {

            error_propagate(errp, err);

            return;

        }

        sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpio[i]), 0, gpio_table[i].addr);

        /* Connect GPIO IRQ to PIC */

        sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio[i]), 0,

                           qdev_get_gpio_in(DEVICE(&s->avic),

                                            gpio_table[i].irq));

    }



    /* initialize 2 x 16 KB ROM */

    memory_region_init_rom_device(&s->rom[0], NULL, NULL, NULL,

                                  "imx25.rom0", FSL_IMX25_ROM0_SIZE, &err);

hw/arm/fsl-imx31.c

+30 −0
Original line number Diff line number Diff line
@@ -55,6 +55,11 @@ static void fsl_imx31_init(Object *obj) 
        object_initialize(&s->i2c[i], sizeof(s->i2c[i]), TYPE_IMX_I2C);

        qdev_set_parent_bus(DEVICE(&s->i2c[i]), sysbus_get_default());

    }



    for (i = 0; i < FSL_IMX31_NUM_GPIOS; i++) {

        object_initialize(&s->gpio[i], sizeof(s->gpio[i]), TYPE_IMX_GPIO);

        qdev_set_parent_bus(DEVICE(&s->gpio[i]), sysbus_get_default());

    }

}



static void fsl_imx31_realize(DeviceState *dev, Error **errp)
@@ -184,6 +189,31 @@ static void fsl_imx31_realize(DeviceState *dev, Error **errp) 
                                            i2c_table[i].irq));

    }



    /* Initialize all GPIOs */

    for (i = 0; i < FSL_IMX31_NUM_GPIOS; i++) {

        static const struct {

            hwaddr addr;

            unsigned int irq;

        } gpio_table[FSL_IMX31_NUM_GPIOS] = {

            { FSL_IMX31_GPIO1_ADDR, FSL_IMX31_GPIO1_IRQ },

            { FSL_IMX31_GPIO2_ADDR, FSL_IMX31_GPIO2_IRQ },

            { FSL_IMX31_GPIO3_ADDR, FSL_IMX31_GPIO3_IRQ }

        };



        object_property_set_bool(OBJECT(&s->gpio[i]), false, "has-edge-sel",

                                 &error_abort);

        object_property_set_bool(OBJECT(&s->gpio[i]), true, "realized", &err);

        if (err) {

            error_propagate(errp, err);

            return;

        }

        sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpio[i]), 0, gpio_table[i].addr);

        /* Connect GPIO IRQ to PIC */

        sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio[i]), 0,

                           qdev_get_gpio_in(DEVICE(&s->avic),

                                            gpio_table[i].irq));

    }



    /* On a real system, the first 16k is a `secure boot rom' */

    memory_region_init_rom_device(&s->secure_rom, NULL, NULL, NULL,

                                  "imx31.secure_rom",

hw/arm/xlnx-zynqmp.c

+5 −5
Original line number Diff line number Diff line
@@ -128,7 +128,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) 
    qdev_prop_set_uint32(DEVICE(&s->gic), "num-cpu", XLNX_ZYNQMP_NUM_APU_CPUS);

    object_property_set_bool(OBJECT(&s->gic), true, "realized", &err);

    if (err) {

        error_propagate((errp), (err));

        error_propagate(errp, err);

        return;

    }

    assert(ARRAY_SIZE(xlnx_zynqmp_gic_regions) == XLNX_ZYNQMP_GIC_REGIONS);
@@ -173,7 +173,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) 
        object_property_set_bool(OBJECT(&s->apu_cpu[i]), true, "realized",

                                 &err);

        if (err) {

            error_propagate((errp), (err));

            error_propagate(errp, err);

            return;

        }
@@ -206,7 +206,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) 
        object_property_set_bool(OBJECT(&s->rpu_cpu[i]), true, "realized",

                                 &err);

        if (err) {

            error_propagate((errp), (err));

            error_propagate(errp, err);

            return;

        }

    }
@@ -229,7 +229,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) 
        }

        object_property_set_bool(OBJECT(&s->gem[i]), true, "realized", &err);

        if (err) {

            error_propagate((errp), (err));

            error_propagate(errp, err);

            return;

        }

        sysbus_mmio_map(SYS_BUS_DEVICE(&s->gem[i]), 0, gem_addr[i]);
@@ -240,7 +240,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) 
    for (i = 0; i < XLNX_ZYNQMP_NUM_UARTS; i++) {

        object_property_set_bool(OBJECT(&s->uart[i]), true, "realized", &err);

        if (err) {

            error_propagate((errp), (err));

            error_propagate(errp, err);

            return;

        }

        sysbus_mmio_map(SYS_BUS_DEVICE(&s->uart[i]), 0, uart_addr[i]);

hw/cpu/a15mpcore.c

+1 −1
Original line number Diff line number Diff line
@@ -64,7 +64,7 @@ static void a15mp_priv_realize(DeviceState *dev, Error **errp) 
         * either all the CPUs have TZ, or none do.

         */

        cpuobj = OBJECT(qemu_get_cpu(0));

        has_el3 = object_property_find(cpuobj, "has_el3", &error_abort) &&

        has_el3 = object_property_find(cpuobj, "has_el3", NULL) &&

            object_property_get_bool(cpuobj, "has_el3", &error_abort);

        qdev_prop_set_bit(gicdev, "has-security-extensions", has_el3);

    }

hw/cpu/a9mpcore.c

+1 −1
Original line number Diff line number Diff line
@@ -69,7 +69,7 @@ static void a9mp_priv_realize(DeviceState *dev, Error **errp) 
     * either all the CPUs have TZ, or none do.

     */

    cpuobj = OBJECT(qemu_get_cpu(0));

    has_el3 = object_property_find(cpuobj, "has_el3", &error_abort) &&

    has_el3 = object_property_find(cpuobj, "has_el3", NULL) &&

        object_property_get_bool(cpuobj, "has_el3", &error_abort);

    qdev_prop_set_bit(gicdev, "has-security-extensions", has_el3);