Commit 7c208e0f authored by Richard Henderson's avatar Richard Henderson Committed by Peter Maydell
Browse files

target/arm: Use arm_hcr_el2_eff more places



Since arm_hcr_el2_eff includes a check against
arm_is_secure_below_el3, we can often remove a
nearby check against secure state.

In some cases, sort the call to arm_hcr_el2_eff
to the end of a short-circuit logical sequence.

Reviewed-by: default avatarPeter Maydell <peter.maydell@linaro.org>
Signed-off-by: default avatarRichard Henderson <richard.henderson@linaro.org>
Message-id: 20181210150501.7990-3-richard.henderson@linaro.org
Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parent f7778444
Loading
Loading
Loading
Loading
+5 −7
Original line number Diff line number Diff line
@@ -448,7 +448,7 @@ static CPAccessResult access_tdosa(CPUARMState *env, const ARMCPRegInfo *ri,
    int el = arm_current_el(env);
    bool mdcr_el2_tdosa = (env->cp15.mdcr_el2 & MDCR_TDOSA) ||
        (env->cp15.mdcr_el2 & MDCR_TDE) ||
        (env->cp15.hcr_el2 & HCR_TGE);
        (arm_hcr_el2_eff(env) & HCR_TGE);

    if (el < 2 && mdcr_el2_tdosa && !arm_is_secure_below_el3(env)) {
        return CP_ACCESS_TRAP_EL2;
@@ -468,7 +468,7 @@ static CPAccessResult access_tdra(CPUARMState *env, const ARMCPRegInfo *ri,
    int el = arm_current_el(env);
    bool mdcr_el2_tdra = (env->cp15.mdcr_el2 & MDCR_TDRA) ||
        (env->cp15.mdcr_el2 & MDCR_TDE) ||
        (env->cp15.hcr_el2 & HCR_TGE);
        (arm_hcr_el2_eff(env) & HCR_TGE);

    if (el < 2 && mdcr_el2_tdra && !arm_is_secure_below_el3(env)) {
        return CP_ACCESS_TRAP_EL2;
@@ -488,7 +488,7 @@ static CPAccessResult access_tda(CPUARMState *env, const ARMCPRegInfo *ri,
    int el = arm_current_el(env);
    bool mdcr_el2_tda = (env->cp15.mdcr_el2 & MDCR_TDA) ||
        (env->cp15.mdcr_el2 & MDCR_TDE) ||
        (env->cp15.hcr_el2 & HCR_TGE);
        (arm_hcr_el2_eff(env) & HCR_TGE);

    if (el < 2 && mdcr_el2_tda && !arm_is_secure_below_el3(env)) {
        return CP_ACCESS_TRAP_EL2;
@@ -4566,8 +4566,7 @@ int sve_exception_el(CPUARMState *env, int el)
        if (disabled) {
            /* route_to_el2 */
            return (arm_feature(env, ARM_FEATURE_EL2)
                    && !arm_is_secure(env)
                    && (env->cp15.hcr_el2 & HCR_TGE) ? 2 : 1);
                    && (arm_hcr_el2_eff(env) & HCR_TGE) ? 2 : 1);
        }

        /* Check CPACR.FPEN.  */
@@ -6216,9 +6215,8 @@ static int bad_mode_switch(CPUARMState *env, int mode, CPSRWriteType write_type)
         * and CPS are treated as illegal mode changes.
         */
        if (write_type == CPSRWriteByInstr &&
            (env->cp15.hcr_el2 & HCR_TGE) &&
            (env->uncached_cpsr & CPSR_M) == ARM_CPU_MODE_MON &&
            !arm_is_secure_below_el3(env)) {
            (arm_hcr_el2_eff(env) & HCR_TGE)) {
            return 1;
        }
        return 0;
+6 −8
Original line number Diff line number Diff line
@@ -33,8 +33,7 @@ void raise_exception(CPUARMState *env, uint32_t excp,
{
    CPUState *cs = CPU(arm_env_get_cpu(env));

    if ((env->cp15.hcr_el2 & HCR_TGE) &&
        target_el == 1 && !arm_is_secure(env)) {
    if (target_el == 1 && (arm_hcr_el2_eff(env) & HCR_TGE)) {
        /*
         * Redirect NS EL1 exceptions to NS EL2. These are reported with
         * their original syndrome register value, with the exception of
@@ -428,9 +427,9 @@ static inline int check_wfx_trap(CPUARMState *env, bool is_wfe)
     * No need for ARM_FEATURE check as if HCR_EL2 doesn't exist the
     * bits will be zero indicating no trap.
     */
    if (cur_el < 2 && !arm_is_secure(env)) {
        mask = (is_wfe) ? HCR_TWE : HCR_TWI;
        if (env->cp15.hcr_el2 & mask) {
    if (cur_el < 2) {
        mask = is_wfe ? HCR_TWE : HCR_TWI;
        if (arm_hcr_el2_eff(env) & mask) {
            return 2;
        }
    }
@@ -995,7 +994,7 @@ void HELPER(pre_smc)(CPUARMState *env, uint32_t syndrome)
                        exception_target_el(env));
    }

    if (!secure && cur_el == 1 && (env->cp15.hcr_el2 & HCR_TSC)) {
    if (cur_el == 1 && (arm_hcr_el2_eff(env) & HCR_TSC)) {
        /* In NS EL1, HCR controlled routing to EL2 has priority over SMD.
         * We also want an EL2 guest to be able to forbid its EL1 from
         * making PSCI calls into QEMU's "firmware" via HCR.TSC.
@@ -1098,8 +1097,7 @@ void HELPER(exception_return)(CPUARMState *env)
        goto illegal_return;
    }

    if (new_el == 1 && (env->cp15.hcr_el2 & HCR_TGE)
        && !arm_is_secure_below_el3(env)) {
    if (new_el == 1 && (arm_hcr_el2_eff(env) & HCR_TGE)) {
        goto illegal_return;
    }