Commit 7c0eb318 authored by Laurent Vivier's avatar Laurent Vivier
Browse files

target-m68k: update move to/from ccr/sr 



Signed-off-by: default avatarLaurent Vivier <laurent@vivier.eu>
Reviewed-by: default avatarRichard Henderson <rth@twiddle.net>
parent 20a8856e

target-m68k/translate.c

+22 −31
Original line number Diff line number Diff line
@@ -1368,12 +1368,10 @@ static TCGv gen_get_ccr(DisasContext *s) 


DISAS_INSN(move_from_ccr)

{

    TCGv reg;

    TCGv ccr;



    ccr = gen_get_ccr(s);

    reg = DREG(insn, 0);

    gen_partset_reg(OS_WORD, reg, ccr);

    DEST_EA(env, insn, OS_WORD, ccr, NULL);

}



DISAS_INSN(neg)
@@ -1400,37 +1398,31 @@ static void gen_set_sr_im(DisasContext *s, uint16_t val, int ccr_only) 
    }

}



static void gen_set_sr(CPUM68KState *env, DisasContext *s, uint16_t insn,

                       int ccr_only)

static void gen_set_sr(DisasContext *s, TCGv val, int ccr_only)

{

    TCGv tmp;

    TCGv reg;



    s->cc_op = CC_OP_FLAGS;

    if ((insn & 0x38) == 0)

      {

    tmp = tcg_temp_new();

        reg = DREG(insn, 0);

        tcg_gen_andi_i32(QREG_CC_DEST, reg, 0xf);

        tcg_gen_shri_i32(tmp, reg, 4);

    tcg_gen_andi_i32(QREG_CC_DEST, val, 0xf);

    tcg_gen_shri_i32(tmp, val, 4);

    tcg_gen_andi_i32(QREG_CC_X, tmp, 1);

    if (!ccr_only) {

            gen_helper_set_sr(cpu_env, reg);

        gen_helper_set_sr(cpu_env, val);

    }

}

    else if ((insn & 0x3f) == 0x3c)



static void gen_move_to_sr(CPUM68KState *env, DisasContext *s, uint16_t insn,

                           int ccr_only)

{

        uint16_t val;

        val = read_im16(env, s);

        gen_set_sr_im(s, val, ccr_only);

      }

    else

        disas_undef(env, s, insn);

    TCGv src;

    s->cc_op = CC_OP_FLAGS;

    SRC_EA(env, src, OS_WORD, 0, NULL);

    gen_set_sr(s, src, ccr_only);

}





DISAS_INSN(move_to_ccr)

{

    gen_set_sr(env, s, insn, 1);

    gen_move_to_sr(env, s, insn, 1);

}



DISAS_INSN(not)
@@ -1957,16 +1949,14 @@ DISAS_INSN(strldsr) 


DISAS_INSN(move_from_sr)

{

    TCGv reg;

    TCGv sr;



    if (IS_USER(s)) {

    if (IS_USER(s) && !m68k_feature(env, M68K_FEATURE_M68000)) {

        gen_exception(s, s->pc - 2, EXCP_PRIVILEGE);

        return;

    }

    sr = gen_get_sr(s);

    reg = DREG(insn, 0);

    gen_partset_reg(OS_WORD, reg, sr);

    DEST_EA(env, insn, OS_WORD, sr, NULL);

}



DISAS_INSN(move_to_sr)
@@ -1975,7 +1965,7 @@ DISAS_INSN(move_to_sr) 
        gen_exception(s, s->pc - 2, EXCP_PRIVILEGE);

        return;

    }

    gen_set_sr(env, s, insn, 0);

    gen_move_to_sr(env, s, insn, 0);

    gen_lookup_tb(s);

}
@@ -2872,6 +2862,7 @@ void register_m68k_insns (CPUM68KState *env) 
    BASE(clr,       4200, ff00);

    BASE(undef,     42c0, ffc0);

    INSN(move_from_ccr, 42c0, fff8, CF_ISA_A);

    INSN(move_from_ccr, 42c0, ffc0, M68000);

    INSN(neg,       4480, fff8, CF_ISA_A);

    INSN(neg,       4400, ff00, M68000);

    INSN(undef,     44c0, ffc0, M68000);