Commit 7b1db090 authored by Peter Maydell's avatar Peter Maydell
Browse files

Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20180323' into staging 



target-arm queue:
 * arm/translate-a64: don't lose interrupts after unmasking via write to DAIF
 * sdhci: fix incorrect use of Error *
 * hw/intc/arm_gicv3: Fix secure-GIC NS ICC_PMR and ICC_RPR accesses
 * hw/arm/bcm2836: Use the Cortex-A7 instead of Cortex-A15
 * i.MX: Support serial RS-232 break properly
 * mach-virt: Set VM's SMBIOS system version to mc->name
 * target/arm: Honour MDCR_EL2.TDE when routing exceptions due to BKPT/BRK
 * target/arm: Factor out code to calculate FSR for debug exceptions
 * target/arm: Set FSR for BKPT, BRK when raising exception
 * target/arm: Always set FAR to a known unknown value for debug exceptions

# gpg: Signature made Fri 23 Mar 2018 18:48:57 GMT
# gpg:                using RSA key 3C2525ED14360CDE
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>"
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>"
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-target-arm-20180323:
  target/arm: Always set FAR to a known unknown value for debug exceptions
  target/arm: Set FSR for BKPT, BRK when raising exception
  target/arm: Factor out code to calculate FSR for debug exceptions
  target/arm: Honour MDCR_EL2.TDE when routing exceptions due to BKPT/BRK
  mach-virt: Set VM's SMBIOS system version to mc->name
  i.MX: Support serial RS-232 break properly
  hw/arm/bcm2836: Use the Cortex-A7 instead of Cortex-A15
  hw/intc/arm_gicv3: Fix secure-GIC NS ICC_PMR and ICC_RPR accesses
  sdhci: fix incorrect use of Error *
  arm/translate-a64: treat DISAS_UPDATE as variant of DISAS_EXIT

Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parents 77fea92d 548f514c

hw/arm/bcm2836.c

+1 −1
Original line number Diff line number Diff line
@@ -32,7 +32,7 @@ struct BCM283XInfo { 
static const BCM283XInfo bcm283x_socs[] = {

    {

        .name = TYPE_BCM2836,

        .cpu_type = ARM_CPU_TYPE_NAME("cortex-a15"),

        .cpu_type = ARM_CPU_TYPE_NAME("cortex-a7"),

        .clusterid = 0xf,

    },

#ifdef TARGET_AARCH64

hw/arm/raspi.c

+1 −1
Original line number Diff line number Diff line
@@ -226,7 +226,7 @@ static void raspi2_machine_init(MachineClass *mc) 
    mc->no_parallel = 1;

    mc->no_floppy = 1;

    mc->no_cdrom = 1;

    mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a15");

    mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a7");

    mc->max_cpus = BCM283X_NCPUS;

    mc->min_cpus = BCM283X_NCPUS;

    mc->default_cpus = BCM283X_NCPUS;

hw/arm/virt.c

+7 −1
Original line number Diff line number Diff line
@@ -1132,6 +1132,8 @@ static void *machvirt_dtb(const struct arm_boot_info *binfo, int *fdt_size) 


static void virt_build_smbios(VirtMachineState *vms)

{

    MachineClass *mc = MACHINE_GET_CLASS(vms);

    VirtMachineClass *vmc = VIRT_MACHINE_GET_CLASS(vms);

    uint8_t *smbios_tables, *smbios_anchor;

    size_t smbios_tables_len, smbios_anchor_len;

    const char *product = "QEMU Virtual Machine";
@@ -1145,7 +1147,8 @@ static void virt_build_smbios(VirtMachineState *vms) 
    }



    smbios_set_defaults("QEMU", product,

                        "1.0", false, true, SMBIOS_ENTRY_POINT_30);

                        vmc->smbios_old_sys_ver ? "1.0" : mc->name, false,

                        true, SMBIOS_ENTRY_POINT_30);



    smbios_get_tables(NULL, 0, &smbios_tables, &smbios_tables_len,

                      &smbios_anchor, &smbios_anchor_len);
@@ -1646,8 +1649,11 @@ static void virt_2_11_instance_init(Object *obj) 


static void virt_machine_2_11_options(MachineClass *mc)

{

    VirtMachineClass *vmc = VIRT_MACHINE_CLASS(OBJECT_CLASS(mc));



    virt_machine_2_12_options(mc);

    SET_MACHINE_COMPAT(mc, VIRT_COMPAT_2_11);

    vmc->smbios_old_sys_ver = true;

}

DEFINE_VIRT_MACHINE(2, 11)

hw/char/imx_serial.c

+4 −1
Original line number Diff line number Diff line
@@ -308,6 +308,9 @@ static void imx_put_data(void *opaque, uint32_t value) 
    s->usr2 |= USR2_RDR;

    s->uts1 &= ~UTS1_RXEMPTY;

    s->readbuff = value;

    if (value & URXD_BRK) {

        s->usr2 |= USR2_BRCD;

    }

    imx_update(s);

}
@@ -319,7 +322,7 @@ static void imx_receive(void *opaque, const uint8_t *buf, int size) 
static void imx_event(void *opaque, int event)

{

    if (event == CHR_EVENT_BREAK) {

        imx_put_data(opaque, URXD_BRK);

        imx_put_data(opaque, URXD_BRK | URXD_FRMERR | URXD_ERR);

    }

}

hw/intc/arm_gicv3_cpuif.c

+3 −3
Original line number Diff line number Diff line
@@ -836,7 +836,7 @@ static uint64_t icc_pmr_read(CPUARMState *env, const ARMCPRegInfo *ri) 
        /* NS access and Group 0 is inaccessible to NS: return the

         * NS view of the current priority

         */

        if (value & 0x80) {

        if ((value & 0x80) == 0) {

            /* Secure priorities not visible to NS */

            value = 0;

        } else if (value != 0xff) {
@@ -871,7 +871,7 @@ static void icc_pmr_write(CPUARMState *env, const ARMCPRegInfo *ri, 
            /* Current PMR in the secure range, don't allow NS to change it */

            return;

        }

        value = (value >> 1) & 0x80;

        value = (value >> 1) | 0x80;

    }

    cs->icc_pmr_el1 = value;

    gicv3_cpuif_update(cs);
@@ -1609,7 +1609,7 @@ static uint64_t icc_rpr_read(CPUARMState *env, const ARMCPRegInfo *ri) 
    if (arm_feature(env, ARM_FEATURE_EL3) &&

        !arm_is_secure(env) && (env->cp15.scr_el3 & SCR_FIQ)) {

        /* NS GIC access and Group 0 is inaccessible to NS */

        if (prio & 0x80) {

        if ((prio & 0x80) == 0) {

            /* NS mustn't see priorities in the Secure half of the range */

            prio = 0;

        } else if (prio != 0xff) {