Loading target/i386/cpu.c +3 −1 Original line number Diff line number Diff line Loading @@ -4040,8 +4040,10 @@ static void x86_cpu_common_class_init(ObjectClass *oc, void *data) cc->class_by_name = x86_cpu_class_by_name; cc->parse_features = x86_cpu_parse_featurestr; cc->has_work = x86_cpu_has_work; #ifdef CONFIG_TCG cc->do_interrupt = x86_cpu_do_interrupt; cc->cpu_exec_interrupt = x86_cpu_exec_interrupt; #endif cc->dump_state = x86_cpu_dump_state; cc->get_crash_info = x86_cpu_get_crash_info; cc->set_pc = x86_cpu_set_pc; Loading Loading @@ -4070,7 +4072,7 @@ static void x86_cpu_common_class_init(ObjectClass *oc, void *data) cc->gdb_core_xml_file = "i386-32bit.xml"; cc->gdb_num_core_regs = 41; #endif #ifndef CONFIG_USER_ONLY #if defined(CONFIG_TCG) && !defined(CONFIG_USER_ONLY) cc->debug_excp_handler = breakpoint_handler; #endif cc->cpu_exec_enter = x86_cpu_exec_enter; Loading target/i386/cpu.h +7 −1 Original line number Diff line number Diff line Loading @@ -52,7 +52,9 @@ #include "exec/cpu-defs.h" #ifdef CONFIG_TCG #include "fpu/softfloat.h" #endif #define R_EAX 0 #define R_ECX 1 Loading Loading @@ -1597,7 +1599,11 @@ uint32_t cpu_cc_compute_all(CPUX86State *env1, int op); static inline uint32_t cpu_compute_eflags(CPUX86State *env) { return env->eflags | cpu_cc_compute_all(env, CC_OP) | (env->df & DF_MASK); uint32_t eflags = env->eflags; if (tcg_enabled()) { eflags |= cpu_cc_compute_all(env, CC_OP) | (env->df & DF_MASK); } return eflags; } /* NOTE: the translator must set DisasContext.cc_op to CC_OP_EFLAGS Loading target/i386/helper.c +1 −1 Original line number Diff line number Diff line Loading @@ -990,7 +990,7 @@ void cpu_report_tpr_access(CPUX86State *env, TPRAccess access) env->tpr_access_type = access; cpu_interrupt(cs, CPU_INTERRUPT_TPR); } else { } else if (tcg_enabled()) { cpu_restore_state(cs, cs->mem_io_pc); apic_handle_tpr_access_report(cpu->apic_state, env->eip, access); Loading target/i386/machine.c +5 −5 Original line number Diff line number Diff line Loading @@ -281,16 +281,16 @@ static int cpu_post_load(void *opaque, int version_id) env->fptags[i] = (env->fptag_vmstate >> i) & 1; } if (tcg_enabled()) { target_ulong dr7; update_fp_status(env); update_mxcsr_status(env); } cpu_breakpoint_remove_all(cs, BP_CPU); cpu_watchpoint_remove_all(cs, BP_CPU); { /* Indicate all breakpoints disabled, as they are, then let the helper re-enable them. */ target_ulong dr7 = env->dr[7]; dr7 = env->dr[7]; env->dr[7] = dr7 & ~(DR7_GLOBAL_BP_MASK | DR7_LOCAL_BP_MASK); cpu_x86_update_dr7(env, dr7); } Loading Loading
target/i386/cpu.c +3 −1 Original line number Diff line number Diff line Loading @@ -4040,8 +4040,10 @@ static void x86_cpu_common_class_init(ObjectClass *oc, void *data) cc->class_by_name = x86_cpu_class_by_name; cc->parse_features = x86_cpu_parse_featurestr; cc->has_work = x86_cpu_has_work; #ifdef CONFIG_TCG cc->do_interrupt = x86_cpu_do_interrupt; cc->cpu_exec_interrupt = x86_cpu_exec_interrupt; #endif cc->dump_state = x86_cpu_dump_state; cc->get_crash_info = x86_cpu_get_crash_info; cc->set_pc = x86_cpu_set_pc; Loading Loading @@ -4070,7 +4072,7 @@ static void x86_cpu_common_class_init(ObjectClass *oc, void *data) cc->gdb_core_xml_file = "i386-32bit.xml"; cc->gdb_num_core_regs = 41; #endif #ifndef CONFIG_USER_ONLY #if defined(CONFIG_TCG) && !defined(CONFIG_USER_ONLY) cc->debug_excp_handler = breakpoint_handler; #endif cc->cpu_exec_enter = x86_cpu_exec_enter; Loading
target/i386/cpu.h +7 −1 Original line number Diff line number Diff line Loading @@ -52,7 +52,9 @@ #include "exec/cpu-defs.h" #ifdef CONFIG_TCG #include "fpu/softfloat.h" #endif #define R_EAX 0 #define R_ECX 1 Loading Loading @@ -1597,7 +1599,11 @@ uint32_t cpu_cc_compute_all(CPUX86State *env1, int op); static inline uint32_t cpu_compute_eflags(CPUX86State *env) { return env->eflags | cpu_cc_compute_all(env, CC_OP) | (env->df & DF_MASK); uint32_t eflags = env->eflags; if (tcg_enabled()) { eflags |= cpu_cc_compute_all(env, CC_OP) | (env->df & DF_MASK); } return eflags; } /* NOTE: the translator must set DisasContext.cc_op to CC_OP_EFLAGS Loading
target/i386/helper.c +1 −1 Original line number Diff line number Diff line Loading @@ -990,7 +990,7 @@ void cpu_report_tpr_access(CPUX86State *env, TPRAccess access) env->tpr_access_type = access; cpu_interrupt(cs, CPU_INTERRUPT_TPR); } else { } else if (tcg_enabled()) { cpu_restore_state(cs, cs->mem_io_pc); apic_handle_tpr_access_report(cpu->apic_state, env->eip, access); Loading
target/i386/machine.c +5 −5 Original line number Diff line number Diff line Loading @@ -281,16 +281,16 @@ static int cpu_post_load(void *opaque, int version_id) env->fptags[i] = (env->fptag_vmstate >> i) & 1; } if (tcg_enabled()) { target_ulong dr7; update_fp_status(env); update_mxcsr_status(env); } cpu_breakpoint_remove_all(cs, BP_CPU); cpu_watchpoint_remove_all(cs, BP_CPU); { /* Indicate all breakpoints disabled, as they are, then let the helper re-enable them. */ target_ulong dr7 = env->dr[7]; dr7 = env->dr[7]; env->dr[7] = dr7 & ~(DR7_GLOBAL_BP_MASK | DR7_LOCAL_BP_MASK); cpu_x86_update_dr7(env, dr7); } Loading