Loading block.c +0 −1 Original line number Diff line number Diff line Loading @@ -56,7 +56,6 @@ static int bdrv_read_em(BlockDriverState *bs, int64_t sector_num, static int bdrv_write_em(BlockDriverState *bs, int64_t sector_num, const uint8_t *buf, int nb_sectors); BlockDriverState *bdrv_first; static BlockDriver *first_drv; int path_is_absolute(const char *path) Loading exec-all.h +3 −2 Original line number Diff line number Diff line Loading @@ -57,8 +57,7 @@ typedef void (GenOpFunc1)(long); typedef void (GenOpFunc2)(long, long); typedef void (GenOpFunc3)(long, long, long); extern FILE *logfile; extern int loglevel; #include "qemu-log.h" void gen_intermediate_code(CPUState *env, struct TranslationBlock *tb); void gen_intermediate_code_pc(CPUState *env, struct TranslationBlock *tb); Loading Loading @@ -290,6 +289,8 @@ extern int tb_invalidated_flag; void tlb_fill(target_ulong addr, int is_write, int mmu_idx, void *retaddr); #include "softmmu_defs.h" #define ACCESS_TYPE (NB_MMU_MODES + 1) #define MEMSUFFIX _code #define env cpu_single_env Loading hw/arm-misc.h +3 −0 Original line number Diff line number Diff line Loading @@ -34,6 +34,9 @@ struct arm_boot_info { void arm_load_kernel(CPUState *env, struct arm_boot_info *info); /* armv7m_nvic.c */ /* Multiplication factor to convert from system clock ticks to qemu timer ticks. */ int system_clock_scale; qemu_irq *armv7m_nvic_init(CPUState *env); Loading hw/armv7m_nvic.c +0 −4 Original line number Diff line number Diff line Loading @@ -50,10 +50,6 @@ typedef struct { #define SYSTICK_CLKSOURCE (1 << 2) #define SYSTICK_COUNTFLAG (1 << 16) /* Multiplication factor to convert from system clock ticks to qemu timer ticks. */ int system_clock_scale; /* Conversion factor from qemu timer to SysTick frequencies. */ static inline int64_t systick_scale(nvic_state *s) { Loading hw/isa.h +3 −0 Original line number Diff line number Diff line #ifndef HW_ISA_H #define HW_ISA_H /* ISA bus */ extern target_phys_addr_t isa_mem_base; Loading @@ -22,3 +24,4 @@ void DMA_init (int high_page_enable); void DMA_register_channel (int nchan, DMA_transfer_handler transfer_handler, void *opaque); #endif Loading
block.c +0 −1 Original line number Diff line number Diff line Loading @@ -56,7 +56,6 @@ static int bdrv_read_em(BlockDriverState *bs, int64_t sector_num, static int bdrv_write_em(BlockDriverState *bs, int64_t sector_num, const uint8_t *buf, int nb_sectors); BlockDriverState *bdrv_first; static BlockDriver *first_drv; int path_is_absolute(const char *path) Loading
exec-all.h +3 −2 Original line number Diff line number Diff line Loading @@ -57,8 +57,7 @@ typedef void (GenOpFunc1)(long); typedef void (GenOpFunc2)(long, long); typedef void (GenOpFunc3)(long, long, long); extern FILE *logfile; extern int loglevel; #include "qemu-log.h" void gen_intermediate_code(CPUState *env, struct TranslationBlock *tb); void gen_intermediate_code_pc(CPUState *env, struct TranslationBlock *tb); Loading Loading @@ -290,6 +289,8 @@ extern int tb_invalidated_flag; void tlb_fill(target_ulong addr, int is_write, int mmu_idx, void *retaddr); #include "softmmu_defs.h" #define ACCESS_TYPE (NB_MMU_MODES + 1) #define MEMSUFFIX _code #define env cpu_single_env Loading
hw/arm-misc.h +3 −0 Original line number Diff line number Diff line Loading @@ -34,6 +34,9 @@ struct arm_boot_info { void arm_load_kernel(CPUState *env, struct arm_boot_info *info); /* armv7m_nvic.c */ /* Multiplication factor to convert from system clock ticks to qemu timer ticks. */ int system_clock_scale; qemu_irq *armv7m_nvic_init(CPUState *env); Loading
hw/armv7m_nvic.c +0 −4 Original line number Diff line number Diff line Loading @@ -50,10 +50,6 @@ typedef struct { #define SYSTICK_CLKSOURCE (1 << 2) #define SYSTICK_COUNTFLAG (1 << 16) /* Multiplication factor to convert from system clock ticks to qemu timer ticks. */ int system_clock_scale; /* Conversion factor from qemu timer to SysTick frequencies. */ static inline int64_t systick_scale(nvic_state *s) { Loading
hw/isa.h +3 −0 Original line number Diff line number Diff line #ifndef HW_ISA_H #define HW_ISA_H /* ISA bus */ extern target_phys_addr_t isa_mem_base; Loading @@ -22,3 +24,4 @@ void DMA_init (int high_page_enable); void DMA_register_channel (int nchan, DMA_transfer_handler transfer_handler, void *opaque); #endif