Commit 774ee477 authored by Peter Maydell's avatar Peter Maydell
Browse files

Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20150721' into staging 



target-arm queue:
 * don't sync CNTVCT with kernel all the time (fixes VM time weirdnesses)
 * fix a warning compiling disas/arm-a64 with -Wextra

# gpg: Signature made Tue Jul 21 12:15:33 2015 BST using RSA key ID 14360CDE
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"

* remotes/pmaydell/tags/pull-target-arm-20150721:
  disas/arm-a64: Add missing compiler attribute GCC_FMT_ATTR
  target-arm: kvm: Differentiate registers based on write-back levels

Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parents a1bc040d 57b73090

disas/arm-a64.cc

+2 −2
Original line number Diff line number Diff line
@@ -42,7 +42,7 @@ public: 
        stream_ = stream;

    }



    void SetPrintf(int (*printf_fn)(FILE *, const char *, ...)) {

    void SetPrintf(fprintf_function printf_fn) {

        printf_ = printf_fn;

    }
@@ -53,7 +53,7 @@ protected: 
    }



private:

    int (*printf_)(FILE *, const char *, ...);

    fprintf_function printf_;

    FILE *stream_;

};

target-arm/kvm-stub.c

+1 −1
Original line number Diff line number Diff line
@@ -17,7 +17,7 @@ bool write_kvmstate_to_list(ARMCPU *cpu) 
    abort();

}



bool write_list_to_kvmstate(ARMCPU *cpu)

bool write_list_to_kvmstate(ARMCPU *cpu, int level)

{

    abort();

}

target-arm/kvm.c

+5 −1
Original line number Diff line number Diff line
@@ -409,7 +409,7 @@ bool write_kvmstate_to_list(ARMCPU *cpu) 
    return ok;

}



bool write_list_to_kvmstate(ARMCPU *cpu)

bool write_list_to_kvmstate(ARMCPU *cpu, int level)

{

    CPUState *cs = CPU(cpu);

    int i;
@@ -421,6 +421,10 @@ bool write_list_to_kvmstate(ARMCPU *cpu) 
        uint32_t v32;

        int ret;



        if (kvm_arm_cpreg_level(regidx) > level) {

            continue;

        }



        r.id = regidx;

        switch (regidx & KVM_REG_SIZE_MASK) {

        case KVM_REG_SIZE_U32:

target-arm/kvm32.c

+29 −1
Original line number Diff line number Diff line
@@ -153,6 +153,34 @@ bool kvm_arm_reg_syncs_via_cpreg_list(uint64_t regidx) 
    }

}



typedef struct CPRegStateLevel {

    uint64_t regidx;

    int level;

} CPRegStateLevel;



/* All coprocessor registers not listed in the following table are assumed to

 * be of the level KVM_PUT_RUNTIME_STATE. If a register should be written less

 * often, you must add it to this table with a state of either

 * KVM_PUT_RESET_STATE or KVM_PUT_FULL_STATE.

 */

static const CPRegStateLevel non_runtime_cpregs[] = {

    { KVM_REG_ARM_TIMER_CNT, KVM_PUT_FULL_STATE },

};



int kvm_arm_cpreg_level(uint64_t regidx)

{

    int i;



    for (i = 0; i < ARRAY_SIZE(non_runtime_cpregs); i++) {

        const CPRegStateLevel *l = &non_runtime_cpregs[i];

        if (l->regidx == regidx) {

            return l->level;

        }

    }



    return KVM_PUT_RUNTIME_STATE;

}



#define ARM_MPIDR_HWID_BITMASK 0xFFFFFF

#define ARM_CPU_ID_MPIDR       0, 0, 0, 5
@@ -367,7 +395,7 @@ int kvm_arch_put_registers(CPUState *cs, int level) 
     * managed to update the CPUARMState with, and only allowing those

     * to be written back up into the kernel).

     */

    if (!write_list_to_kvmstate(cpu)) {

    if (!write_list_to_kvmstate(cpu, level)) {

        return EINVAL;

    }

target-arm/kvm64.c

+29 −1
Original line number Diff line number Diff line
@@ -139,6 +139,34 @@ bool kvm_arm_reg_syncs_via_cpreg_list(uint64_t regidx) 
    }

}



typedef struct CPRegStateLevel {

    uint64_t regidx;

    int level;

} CPRegStateLevel;



/* All system registers not listed in the following table are assumed to be

 * of the level KVM_PUT_RUNTIME_STATE. If a register should be written less

 * often, you must add it to this table with a state of either

 * KVM_PUT_RESET_STATE or KVM_PUT_FULL_STATE.

 */

static const CPRegStateLevel non_runtime_cpregs[] = {

    { KVM_REG_ARM_TIMER_CNT, KVM_PUT_FULL_STATE },

};



int kvm_arm_cpreg_level(uint64_t regidx)

{

    int i;



    for (i = 0; i < ARRAY_SIZE(non_runtime_cpregs); i++) {

        const CPRegStateLevel *l = &non_runtime_cpregs[i];

        if (l->regidx == regidx) {

            return l->level;

        }

    }



    return KVM_PUT_RUNTIME_STATE;

}



#define AARCH64_CORE_REG(x)   (KVM_REG_ARM64 | KVM_REG_SIZE_U64 | \

                 KVM_REG_ARM_CORE | KVM_REG_ARM_CORE_REG(x))
@@ -280,7 +308,7 @@ int kvm_arch_put_registers(CPUState *cs, int level) 
        return ret;

    }



    if (!write_list_to_kvmstate(cpu)) {

    if (!write_list_to_kvmstate(cpu, level)) {

        return EINVAL;

    }