Commit 76ac9940 authored by Anton Blanchard's avatar Anton Blanchard Committed by Andreas Färber
Browse files

target-ppc: MSR_POW not supported on POWER7/7+/8 



Remove MSR_POW from the msr_mask for POWER7/7P/8.

Signed-off-by: default avatarAnton Blanchard <anton@samba.org>
Reviewed-by: default avatarCédric Le Goater <clg@fr.ibm.com>
Tested-by: default avatarCédric Le Goater <clg@fr.ibm.com>
Signed-off-by: default avatarAndreas Färber <afaerber@suse.de>
parent 5b2b7dc4

target-ppc/translate_init.c

+3 −3
Original line number Diff line number Diff line
@@ -7075,7 +7075,7 @@ POWERPC_FAMILY(POWER7)(ObjectClass *oc, void *data) 
                        PPC2_PERM_ISA206 | PPC2_DIVE_ISA206 |

                        PPC2_ATOMIC_ISA206 | PPC2_FP_CVT_ISA206 |

                        PPC2_FP_TST_ISA206;

    pcc->msr_mask = 0x800000000284FF37ULL;

    pcc->msr_mask = 0x800000000280FF37ULL;

    pcc->mmu_model = POWERPC_MMU_2_06;

#if defined(CONFIG_SOFTMMU)

    pcc->handle_mmu_fault = ppc_hash64_handle_mmu_fault;
@@ -7118,7 +7118,7 @@ POWERPC_FAMILY(POWER7P)(ObjectClass *oc, void *data) 
                        PPC2_PERM_ISA206 | PPC2_DIVE_ISA206 |

                        PPC2_ATOMIC_ISA206 | PPC2_FP_CVT_ISA206 |

                        PPC2_FP_TST_ISA206;

    pcc->msr_mask = 0x800000000284FF37ULL;

    pcc->msr_mask = 0x800000000280FF37ULL;

    pcc->mmu_model = POWERPC_MMU_2_06;

#if defined(CONFIG_SOFTMMU)

    pcc->handle_mmu_fault = ppc_hash64_handle_mmu_fault;
@@ -7175,7 +7175,7 @@ POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data) 
                        PPC2_FP_TST_ISA206 | PPC2_BCTAR_ISA207 |

                        PPC2_LSQ_ISA207 | PPC2_ALTIVEC_207 |

                        PPC2_ISA205 | PPC2_ISA207S;

    pcc->msr_mask = 0x800000000284FF37ULL;

    pcc->msr_mask = 0x800000000280FF37ULL;

    pcc->mmu_model = POWERPC_MMU_2_06;

#if defined(CONFIG_SOFTMMU)

    pcc->handle_mmu_fault = ppc_hash64_handle_mmu_fault;