Commit 747d009d authored by Christoffer Dall's avatar Christoffer Dall Committed by Peter Maydell
Browse files

target-arm: Add GIC phandle to VirtBoardInfo 



Instead of passing the GIC phandle around between functions, add it to
the VirtBoardInfo just like we do for the clock_phandle.  We are about
to add the v2m phandle as well, and it's easier not having to pass
around a bunch of phandles, return multiple values from functions, etc.

Reviewed-by: default avatarEric Auger <eric.auger@linaro.org>
Reviewed-by: default avatarPeter Maydell <peter.maydell@linaro.org>
Signed-off-by: default avatarChristoffer Dall <christoffer.dall@linaro.org>
Message-id: 1432897270-7780-2-git-send-email-christoffer.dall@linaro.org
Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parent 57b6d95e

hw/arm/virt.c

+11 −15
Original line number Diff line number Diff line
@@ -69,6 +69,7 @@ typedef struct VirtBoardInfo { 
    void *fdt;

    int fdt_size;

    uint32_t clock_phandle;

    uint32_t gic_phandle;

} VirtBoardInfo;



typedef struct {
@@ -299,12 +300,11 @@ static void fdt_add_cpu_nodes(const VirtBoardInfo *vbi) 
    }

}



static uint32_t fdt_add_gic_node(const VirtBoardInfo *vbi)

static void fdt_add_gic_node(VirtBoardInfo *vbi)

{

    uint32_t gic_phandle;



    gic_phandle = qemu_fdt_alloc_phandle(vbi->fdt);

    qemu_fdt_setprop_cell(vbi->fdt, "/", "interrupt-parent", gic_phandle);

    vbi->gic_phandle = qemu_fdt_alloc_phandle(vbi->fdt);

    qemu_fdt_setprop_cell(vbi->fdt, "/", "interrupt-parent", vbi->gic_phandle);



    qemu_fdt_add_subnode(vbi->fdt, "/intc");

    /* 'cortex-a15-gic' means 'GIC v2' */
@@ -317,12 +317,10 @@ static uint32_t fdt_add_gic_node(const VirtBoardInfo *vbi) 
                                     2, vbi->memmap[VIRT_GIC_DIST].size,

                                     2, vbi->memmap[VIRT_GIC_CPU].base,

                                     2, vbi->memmap[VIRT_GIC_CPU].size);

    qemu_fdt_setprop_cell(vbi->fdt, "/intc", "phandle", gic_phandle);



    return gic_phandle;

    qemu_fdt_setprop_cell(vbi->fdt, "/intc", "phandle", vbi->gic_phandle);

}



static uint32_t create_gic(const VirtBoardInfo *vbi, qemu_irq *pic)

static void create_gic(VirtBoardInfo *vbi, qemu_irq *pic)

{

    /* We create a standalone GIC v2 */

    DeviceState *gicdev;
@@ -371,7 +369,7 @@ static uint32_t create_gic(const VirtBoardInfo *vbi, qemu_irq *pic) 
        pic[i] = qdev_get_gpio_in(gicdev, i);

    }



    return fdt_add_gic_node(vbi);

    fdt_add_gic_node(vbi);

}



static void create_uart(const VirtBoardInfo *vbi, qemu_irq *pic)
@@ -618,8 +616,7 @@ static void create_pcie_irq_map(const VirtBoardInfo *vbi, uint32_t gic_phandle, 
                           0x7           /* PCI irq */);

}



static void create_pcie(const VirtBoardInfo *vbi, qemu_irq *pic,

                        uint32_t gic_phandle)

static void create_pcie(const VirtBoardInfo *vbi, qemu_irq *pic)

{

    hwaddr base_mmio = vbi->memmap[VIRT_PCIE_MMIO].base;

    hwaddr size_mmio = vbi->memmap[VIRT_PCIE_MMIO].size;
@@ -685,7 +682,7 @@ static void create_pcie(const VirtBoardInfo *vbi, qemu_irq *pic, 
                                 2, base_mmio, 2, size_mmio);



    qemu_fdt_setprop_cell(vbi->fdt, nodename, "#interrupt-cells", 1);

    create_pcie_irq_map(vbi, gic_phandle, irq, nodename);

    create_pcie_irq_map(vbi, vbi->gic_phandle, irq, nodename);



    g_free(nodename);

}
@@ -717,7 +714,6 @@ static void machvirt_init(MachineState *machine) 
    VirtBoardInfo *vbi;

    VirtGuestInfoState *guest_info_state = g_malloc0(sizeof *guest_info_state);

    VirtGuestInfo *guest_info = &guest_info_state->info;

    uint32_t gic_phandle;

    char **cpustr;



    if (!cpu_model) {
@@ -794,13 +790,13 @@ static void machvirt_init(MachineState *machine) 


    create_flash(vbi);



    gic_phandle = create_gic(vbi, pic);

    create_gic(vbi, pic);



    create_uart(vbi, pic);



    create_rtc(vbi, pic);



    create_pcie(vbi, pic, gic_phandle);

    create_pcie(vbi, pic);



    /* Create mmio transports, so the user can create virtio backends

     * (which will be automatically plugged in to the transports). If