Commit 73c5211b authored Sep 12, 2014 by Peter Maydell

target-arm: Move extended_addresses_enabled() to internals.h



Move the utility function extended_addresses_enabled() into
internals.h; we're going to need to call it from op_helper.c.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

parent 9ee98ce8

target-arm/helper.c

+0 −11

Original line number	Diff line number	Diff line
		@@ -304,17 +304,6 @@ void init_cpreg_list(ARMCPU *cpu)
		g_list_free(keys);
		}

		/* Return true if extended addresses are enabled.
		* This is always the case if our translation regime is 64 bit,
		* but depends on TTBCR.EAE for 32 bit.
		*/
		static inline bool extended_addresses_enabled(CPUARMState *env)
		{
		return arm_el_is_aa64(env, 1)
		\|\| ((arm_feature(env, ARM_FEATURE_LPAE)
		&& (env->cp15.c2_control & TTBCR_EAE)));
		}

		static void dacr_write(CPUARMState env, const ARMCPRegInfo ri, uint64_t value)
		{
		ARMCPU *cpu = arm_env_get_cpu(env);

target-arm/internals.h

+11 −0

Original line number	Diff line number	Diff line
		@@ -142,6 +142,17 @@ static inline void update_spsel(CPUARMState *env, uint32_t imm)
		aarch64_restore_sp(env, cur_el);
		}

		/* Return true if extended addresses are enabled.
		* This is always the case if our translation regime is 64 bit,
		* but depends on TTBCR.EAE for 32 bit.
		*/
		static inline bool extended_addresses_enabled(CPUARMState *env)
		{
		return arm_el_is_aa64(env, 1)
		\|\| ((arm_feature(env, ARM_FEATURE_LPAE)
		&& (env->cp15.c2_control & TTBCR_EAE)));
		}

		/* Valid Syndrome Register EC field values */
		enum arm_exception_class {
		EC_UNCATEGORIZED = 0x00,