Commit 71fbecea authored by Peter Maydell's avatar Peter Maydell
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Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20180925-1' into staging



target-arm queue:
 * target/arm: Fix cpu_get_tb_cpu_state() for non-SVE CPUs
 * hw/arm/exynos4210: fix Exynos4210 UART support
 * hw/arm/virt-acpi-build: Add a check for memory-less NUMA nodes
 * arm: Add BBC micro:bit machine
 * aspeed/i2c: Fix interrupt handling bugs
 * hw/arm/smmu-common: Fix the name of the iommu memory regions
 * hw/arm/smmuv3: fix eventq recording and IRQ triggerring
 * hw/intc/arm_gic: Document QEMU interface
 * hw/intc/arm_gic: Drop GIC_BASE_IRQ macro
 * hw/net/pcnet-pci: Convert away from old_mmio accessors
 * hw/timer/cmsdk-apb-dualtimer: Add missing 'break' statements
 * aspeed/timer: fix compile breakage with clang 3.4.2
 * hw/arm/aspeed: change the FMC flash model of the AST2500 evb
 * hw/arm/aspeed: Minor code cleanups
 * target/arm: Start AArch32 CPUs with EL2 but not EL3 in Hyp mode

# gpg: Signature made Tue 25 Sep 2018 15:23:11 BST
# gpg:                using RSA key 3C2525ED14360CDE
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>"
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>"
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-target-arm-20180925-1: (21 commits)
  target/arm: Start AArch32 CPUs with EL2 but not EL3 in Hyp mode
  aspeed/smc: fix some alignment issues
  hw/arm/aspeed: Add an Aspeed machine class
  hw/arm/aspeed: change the FMC flash model of the AST2500 evb
  aspeed/timer: fix compile breakage with clang 3.4.2
  hw/timer/cmsdk-apb-dualtimer: Add missing 'break' statements
  hw/net/pcnet-pci: Unify pcnet_ioport_read/write and pcnet_mmio_read/write
  hw/net/pcnet-pci: Convert away from old_mmio accessors
  hw/intc/arm_gic: Drop GIC_BASE_IRQ macro
  hw/intc/arm_gic: Document QEMU interface
  hw/arm/smmuv3: fix eventq recording and IRQ triggerring
  hw/arm/smmu-common: Fix the name of the iommu memory regions
  aspeed/i2c: Fix receive done interrupt handling
  aspeed/i2c: Handle receive command in separate function
  aspeed/i2c: interrupts should be cleared by software only
  arm: Add BBC micro:bit machine
  arm: Add Nordic Semiconductor nRF51 SoC
  MAINTAINERS: Add NRF51 entry
  hw/arm/virt-acpi-build: Add a check for memory-less NUMA nodes
  hw/arm/exynos4210: fix Exynos4210 UART support
  ...

Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parents 506e4a00 060a65df
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+8 −0
Original line number Diff line number Diff line
@@ -671,6 +671,14 @@ F: include/hw/*/*aspeed*
F: hw/net/ftgmac100.c
F: include/hw/net/ftgmac100.h

NRF51
M: Joel Stanley <joel@jms.id.au>
L: qemu-arm@nongnu.org
S: Maintained
F: hw/arm/nrf51_soc.c
F: hw/arm/microbit.c
F: include/hw/arm/nrf51_soc.h

CRIS Machines
-------------
Axis Dev88
+1 −0
Original line number Diff line number Diff line
@@ -101,6 +101,7 @@ CONFIG_STM32F2XX_SYSCFG=y
CONFIG_STM32F2XX_ADC=y
CONFIG_STM32F2XX_SPI=y
CONFIG_STM32F205_SOC=y
CONFIG_NRF51_SOC=y

CONFIG_CMSDK_APB_TIMER=y
CONFIG_CMSDK_APB_DUALTIMER=y
+1 −0
Original line number Diff line number Diff line
@@ -37,3 +37,4 @@ obj-$(CONFIG_IOTKIT) += iotkit.o
obj-$(CONFIG_FSL_IMX7) += fsl-imx7.o mcimx7d-sabre.o
obj-$(CONFIG_ARM_SMMUV3) += smmu-common.o smmuv3.o
obj-$(CONFIG_FSL_IMX6UL) += fsl-imx6ul.o mcimx6ul-evk.o
obj-$(CONFIG_NRF51_SOC) += nrf51_soc.o microbit.o
+70 −142
Original line number Diff line number Diff line
@@ -15,6 +15,7 @@
#include "cpu.h"
#include "exec/address-spaces.h"
#include "hw/arm/arm.h"
#include "hw/arm/aspeed.h"
#include "hw/arm/aspeed_soc.h"
#include "hw/boards.h"
#include "hw/i2c/smbus.h"
@@ -34,22 +35,6 @@ typedef struct AspeedBoardState {
    MemoryRegion max_ram;
} AspeedBoardState;

typedef struct AspeedBoardConfig {
    const char *soc_name;
    uint32_t hw_strap1;
    const char *fmc_model;
    const char *spi_model;
    uint32_t num_cs;
    void (*i2c_init)(AspeedBoardState *bmc);
} AspeedBoardConfig;

enum {
    PALMETTO_BMC,
    AST2500_EVB,
    ROMULUS_BMC,
    WITHERSPOON_BMC,
};

/* Palmetto hardware value: 0x120CE416 */
#define PALMETTO_BMC_HW_STRAP1 (                                        \
        SCU_AST2400_HW_STRAP_DRAM_SIZE(DRAM_SIZE_256MB) |               \
@@ -88,46 +73,6 @@ enum {
/* Witherspoon hardware value: 0xF10AD216 (but use romulus definition) */
#define WITHERSPOON_BMC_HW_STRAP1 ROMULUS_BMC_HW_STRAP1

static void palmetto_bmc_i2c_init(AspeedBoardState *bmc);
static void ast2500_evb_i2c_init(AspeedBoardState *bmc);
static void romulus_bmc_i2c_init(AspeedBoardState *bmc);
static void witherspoon_bmc_i2c_init(AspeedBoardState *bmc);

static const AspeedBoardConfig aspeed_boards[] = {
    [PALMETTO_BMC] = {
        .soc_name  = "ast2400-a1",
        .hw_strap1 = PALMETTO_BMC_HW_STRAP1,
        .fmc_model = "n25q256a",
        .spi_model = "mx25l25635e",
        .num_cs    = 1,
        .i2c_init  = palmetto_bmc_i2c_init,
    },
    [AST2500_EVB]  = {
        .soc_name  = "ast2500-a1",
        .hw_strap1 = AST2500_EVB_HW_STRAP1,
        .fmc_model = "n25q256a",
        .spi_model = "mx25l25635e",
        .num_cs    = 1,
        .i2c_init  = ast2500_evb_i2c_init,
    },
    [ROMULUS_BMC]  = {
        .soc_name  = "ast2500-a1",
        .hw_strap1 = ROMULUS_BMC_HW_STRAP1,
        .fmc_model = "n25q256a",
        .spi_model = "mx66l1g45g",
        .num_cs    = 2,
        .i2c_init  = romulus_bmc_i2c_init,
    },
    [WITHERSPOON_BMC]  = {
        .soc_name  = "ast2500-a1",
        .hw_strap1 = WITHERSPOON_BMC_HW_STRAP1,
        .fmc_model = "mx25l25635e",
        .spi_model = "mx66l1g45g",
        .num_cs    = 2,
        .i2c_init  = witherspoon_bmc_i2c_init,
    },
};

/*
 * The max ram region is for firmwares that scan the address space
 * with load/store to guess how much RAM the SoC has.
@@ -313,30 +258,6 @@ static void palmetto_bmc_i2c_init(AspeedBoardState *bmc)
    object_property_set_int(OBJECT(dev), 110000, "temperature3", &error_abort);
}

static void palmetto_bmc_init(MachineState *machine)
{
    aspeed_board_init(machine, &aspeed_boards[PALMETTO_BMC]);
}

static void palmetto_bmc_class_init(ObjectClass *oc, void *data)
{
    MachineClass *mc = MACHINE_CLASS(oc);

    mc->desc = "OpenPOWER Palmetto BMC (ARM926EJ-S)";
    mc->init = palmetto_bmc_init;
    mc->max_cpus = 1;
    mc->no_sdcard = 1;
    mc->no_floppy = 1;
    mc->no_cdrom = 1;
    mc->no_parallel = 1;
}

static const TypeInfo palmetto_bmc_type = {
    .name = MACHINE_TYPE_NAME("palmetto-bmc"),
    .parent = TYPE_MACHINE,
    .class_init = palmetto_bmc_class_init,
};

static void ast2500_evb_i2c_init(AspeedBoardState *bmc)
{
    AspeedSoCState *soc = &bmc->soc;
@@ -353,30 +274,6 @@ static void ast2500_evb_i2c_init(AspeedBoardState *bmc)
    i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 11), "ds1338", 0x32);
}

static void ast2500_evb_init(MachineState *machine)
{
    aspeed_board_init(machine, &aspeed_boards[AST2500_EVB]);
}

static void ast2500_evb_class_init(ObjectClass *oc, void *data)
{
    MachineClass *mc = MACHINE_CLASS(oc);

    mc->desc = "Aspeed AST2500 EVB (ARM1176)";
    mc->init = ast2500_evb_init;
    mc->max_cpus = 1;
    mc->no_sdcard = 1;
    mc->no_floppy = 1;
    mc->no_cdrom = 1;
    mc->no_parallel = 1;
}

static const TypeInfo ast2500_evb_type = {
    .name = MACHINE_TYPE_NAME("ast2500-evb"),
    .parent = TYPE_MACHINE,
    .class_init = ast2500_evb_class_init,
};

static void romulus_bmc_i2c_init(AspeedBoardState *bmc)
{
    AspeedSoCState *soc = &bmc->soc;
@@ -386,30 +283,6 @@ static void romulus_bmc_i2c_init(AspeedBoardState *bmc)
    i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 11), "ds1338", 0x32);
}

static void romulus_bmc_init(MachineState *machine)
{
    aspeed_board_init(machine, &aspeed_boards[ROMULUS_BMC]);
}

static void romulus_bmc_class_init(ObjectClass *oc, void *data)
{
    MachineClass *mc = MACHINE_CLASS(oc);

    mc->desc = "OpenPOWER Romulus BMC (ARM1176)";
    mc->init = romulus_bmc_init;
    mc->max_cpus = 1;
    mc->no_sdcard = 1;
    mc->no_floppy = 1;
    mc->no_cdrom = 1;
    mc->no_parallel = 1;
}

static const TypeInfo romulus_bmc_type = {
    .name = MACHINE_TYPE_NAME("romulus-bmc"),
    .parent = TYPE_MACHINE,
    .class_init = romulus_bmc_class_init,
};

static void witherspoon_bmc_i2c_init(AspeedBoardState *bmc)
{
    AspeedSoCState *soc = &bmc->soc;
@@ -433,36 +306,91 @@ static void witherspoon_bmc_i2c_init(AspeedBoardState *bmc)
                     0x60);
}

static void witherspoon_bmc_init(MachineState *machine)
static void aspeed_machine_init(MachineState *machine)
{
    aspeed_board_init(machine, &aspeed_boards[WITHERSPOON_BMC]);
    AspeedMachineClass *amc = ASPEED_MACHINE_GET_CLASS(machine);

    aspeed_board_init(machine, amc->board);
}

static void witherspoon_bmc_class_init(ObjectClass *oc, void *data)
static void aspeed_machine_class_init(ObjectClass *oc, void *data)
{
    MachineClass *mc = MACHINE_CLASS(oc);
    AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
    const AspeedBoardConfig *board = data;

    mc->desc = "OpenPOWER Witherspoon BMC (ARM1176)";
    mc->init = witherspoon_bmc_init;
    mc->desc = board->desc;
    mc->init = aspeed_machine_init;
    mc->max_cpus = 1;
    mc->no_sdcard = 1;
    mc->no_floppy = 1;
    mc->no_cdrom = 1;
    mc->no_parallel = 1;
    amc->board = board;
}

static const TypeInfo witherspoon_bmc_type = {
    .name = MACHINE_TYPE_NAME("witherspoon-bmc"),
static const TypeInfo aspeed_machine_type = {
    .name = TYPE_ASPEED_MACHINE,
    .parent = TYPE_MACHINE,
    .class_init = witherspoon_bmc_class_init,
    .instance_size = sizeof(AspeedMachine),
    .class_size = sizeof(AspeedMachineClass),
    .abstract = true,
};

static void aspeed_machine_init(void)
static const AspeedBoardConfig aspeed_boards[] = {
    {
    type_register_static(&palmetto_bmc_type);
    type_register_static(&ast2500_evb_type);
    type_register_static(&romulus_bmc_type);
    type_register_static(&witherspoon_bmc_type);
        .name      = MACHINE_TYPE_NAME("palmetto-bmc"),
        .desc      = "OpenPOWER Palmetto BMC (ARM926EJ-S)",
        .soc_name  = "ast2400-a1",
        .hw_strap1 = PALMETTO_BMC_HW_STRAP1,
        .fmc_model = "n25q256a",
        .spi_model = "mx25l25635e",
        .num_cs    = 1,
        .i2c_init  = palmetto_bmc_i2c_init,
    }, {
        .name      = MACHINE_TYPE_NAME("ast2500-evb"),
        .desc      = "Aspeed AST2500 EVB (ARM1176)",
        .soc_name  = "ast2500-a1",
        .hw_strap1 = AST2500_EVB_HW_STRAP1,
        .fmc_model = "w25q256",
        .spi_model = "mx25l25635e",
        .num_cs    = 1,
        .i2c_init  = ast2500_evb_i2c_init,
    }, {
        .name      = MACHINE_TYPE_NAME("romulus-bmc"),
        .desc      = "OpenPOWER Romulus BMC (ARM1176)",
        .soc_name  = "ast2500-a1",
        .hw_strap1 = ROMULUS_BMC_HW_STRAP1,
        .fmc_model = "n25q256a",
        .spi_model = "mx66l1g45g",
        .num_cs    = 2,
        .i2c_init  = romulus_bmc_i2c_init,
    }, {
        .name      = MACHINE_TYPE_NAME("witherspoon-bmc"),
        .desc      = "OpenPOWER Witherspoon BMC (ARM1176)",
        .soc_name  = "ast2500-a1",
        .hw_strap1 = WITHERSPOON_BMC_HW_STRAP1,
        .fmc_model = "mx25l25635e",
        .spi_model = "mx66l1g45g",
        .num_cs    = 2,
        .i2c_init  = witherspoon_bmc_i2c_init,
    },
};

static void aspeed_machine_types(void)
{
    int i;

    type_register_static(&aspeed_machine_type);
    for (i = 0; i < ARRAY_SIZE(aspeed_boards); ++i) {
        TypeInfo ti = {
            .name       = aspeed_boards[i].name,
            .parent     = TYPE_ASPEED_MACHINE,
            .class_init = aspeed_machine_class_init,
            .class_data = (void *)&aspeed_boards[i],
        };
        type_register(&ti);
    }
}

type_init(aspeed_machine_init)
type_init(aspeed_machine_types)
+4 −4
Original line number Diff line number Diff line
@@ -352,19 +352,19 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem)

    /*** UARTs ***/
    exynos4210_uart_create(EXYNOS4210_UART0_BASE_ADDR,
                           EXYNOS4210_UART0_FIFO_SIZE, 0, NULL,
                           EXYNOS4210_UART0_FIFO_SIZE, 0, serial_hd(0),
                  s->irq_table[exynos4210_get_irq(EXYNOS4210_UART_INT_GRP, 0)]);

    exynos4210_uart_create(EXYNOS4210_UART1_BASE_ADDR,
                           EXYNOS4210_UART1_FIFO_SIZE, 1, NULL,
                           EXYNOS4210_UART1_FIFO_SIZE, 1, serial_hd(1),
                  s->irq_table[exynos4210_get_irq(EXYNOS4210_UART_INT_GRP, 1)]);

    exynos4210_uart_create(EXYNOS4210_UART2_BASE_ADDR,
                           EXYNOS4210_UART2_FIFO_SIZE, 2, NULL,
                           EXYNOS4210_UART2_FIFO_SIZE, 2, serial_hd(2),
                  s->irq_table[exynos4210_get_irq(EXYNOS4210_UART_INT_GRP, 2)]);

    exynos4210_uart_create(EXYNOS4210_UART3_BASE_ADDR,
                           EXYNOS4210_UART3_FIFO_SIZE, 3, NULL,
                           EXYNOS4210_UART3_FIFO_SIZE, 3, serial_hd(3),
                  s->irq_table[exynos4210_get_irq(EXYNOS4210_UART_INT_GRP, 3)]);

    /*** SD/MMC host controllers ***/
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